G121SN01V3 AU Optronics Corporation, G121SN01V3 Datasheet - Page 16

• Manufacturer Part Number: G121SN01V3
• Manufacturer: AU Optronics Corporation

Specifications of G121SN01V3

• Lead Free Status / Rohs Status: Compliant

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6.3 Signal Description
Pin Assignment:
Signal Description:
Note: Input signals shall be low or Hi-Z state when VDD is off.
The module uses a LVDS receiver embedded in AUO ’s ASIC. LVDS is a differential signal technology for LCD
interface and a high-speed data transfer device. Mating LVDS transmitter: THC63LVDM83A or equivalent device
Pin#
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
Note1： Pin19 can be used for enabling “reverse scan” function.
Signal Name
RxIN0-, RxIN0+
RxIN1-, RxIN1+
RxIN2-, RxIN2+
CKIN-, CKIN+
Reverse
VDD
GND
NC
6-8Bit SEL
REVERSE
NC/GND
CLKIN+
CLKIN-
RIN0+
RIN1+
RIN2+
RIN3+
RIN0-
RIN1-
RIN2-
RIN3-
GND
GND
GND
GND
GND
VCC
VCC
Signal Name
Refer to section 6.1 for scanning direction.
3.3V Power Supply
3.3V Power Supply
GND
Select 6 or 8 Bits LVDS Input (VCC:8Bits ; GND/NC: 6Bits)
Negative(-) LVDS differential data input
Positive(+) LVDS differential data input
GND
Negative(-) LVDS differential data input
Positive(+) LVDS differential data input
GND
Negative(-) LVDS differential data input
Positive(+) LVDS differential data input
GND
Clock Signal(-)
Clock Signal(+)
GND
Negative(-) LVDS differential data input
Positive(+) LVDS differential data
Display Reversed
AUO Test Function
Product Specification
AU OPTRONICS CORPORATION
LVDS differential data input (Red0-Red5, Green0)
LVDS differential data input (Green1-Green5, Blue0-Blue1)
LVDS differential data input (Blue2-Blue5, Hsync, Vsync, DE)
LVDS differential clock input
High: Reverse Display; NC/GND: Normal Display
Ground
+3.3V Power Supply
No Connection
Function(VCC: Display Reverse; GND/NC: Normal Display)
Pin(Do not set this pin to
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input(Used for 8Bits LVDS Input; NC for 6Bits)
Description
Description
(Used for 8Bits LVDS Input; NC for 6Bits)
High)
G121SN01 V3 rev.0.0
G121SN01 V3
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