XC56301PW66 Freescale Semiconductor, XC56301PW66 Datasheet

no-image

XC56301PW66

Manufacturer Part Number
XC56301PW66
Description
DSP Fixed-Point 24-Bit 66MHz 66MIPS 208-Pin TQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XC56301PW66

Package
208TQFP
Numeric And Arithmetic Format
Fixed-Point
Maximum Speed
66 MHz
Ram Size
24 KB
Device Million Instructions Per Second
66 MIPS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC56301PW66
Manufacturer:
MOTOROLA
Quantity:
10 000
Part Number:
XC56301PW66
Manufacturer:
XILINX
0
Part Number:
XC56301PW66
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
© Freescale Semiconductor, Inc., 1996, 2005. All rights reserved.
Freescale Semiconductor
Product Brief
DSP56301
24-Bit Digital Signal Processor
The DSP56301 is a member of the DSP56300 core family of programmable CMOS DSPs. This family uses a high-
performance, single clock cycle per instruction engine. Significant architectural features of the DSP56300 core
family include a barrel shifter, 24-bit addressing, instruction cache, and DMA. The DSP56301 performs at
66/80/100 MIPS using an internal 66/80/100 MHz clock at 3.0–3.6 volts. The DSP56300 core family offers a rich
instruction set and low power dissipation, as well as increasing levels of speed and power, enabling wireless,
telecommunications, and multimedia products.
EXTAL
PINIT/NMI
XTAL
RESET
2
Internal
Generator
Timer
Switch
Triple
Six Channel
Generation
DMA Unit
Boot-
Data
strap
ROM
Bus
Address
Clock
PLL
Unit
Interface
52
Host
Controller
Program
Interrupt
6
Interface
Expansion Area
ESSI
Figure 1. DSP56301 Block Diagram
6
Peripheral
MODD/IRQD
MODC/IRQC
MODB/IRQB
MODA/IRQA
Controller
Program
Decode
Interface
3
SCI
Generator
Program
Address
(3072 × 24 and
Program RAM
1024 × 24)
Instruction
4096 × 24
Cache
DSP56300
DDB
YDB
XDB
PDB
GDB
or
Memory Expansion Area
24-Bit
Core
DAB
YAB
XAB
PAB
24 × 24 + 56 → 56-bit MAC
Two 56-bit Accumulators
56-bit Barrel Shifter
2048 × 24
X Data
RAM
Data ALU
2048 × 24
Y Data
RAM
I - Cache
Data Bus
Interface
External
Address
External
Control
External
Switch
Switch
Bus
Bus
OnCE™
&
Mngmnt
JTAG
Power
Rev. 2, 11/2005
DSP56301PB
ADDRESS
CONTROL
DATA
24
14
24
6

Related parts for XC56301PW66

XC56301PW66 Summary of contents

Page 1

... Internal Data Bus Switch EXTAL Clock Generator Program XTAL Interrupt PLL Controller 2 RESET PINIT/NMI © Freescale Semiconductor, Inc., 1996, 2005. All rights reserved Memory Expansion Area Program RAM 4096 × 24 ESSI SCI or Interface Interface (3072 × 24 and Instruction Cache 1024 × 24) ...

Page 2

... DSP56301 Product Brief, Rev Data Ram Size Size 2048 × 24-bit 2048 × 24-bit 3072 × 24-bit 3072 × 24-bit Freescale Semiconductor ...

Page 3

... Freescale Literature Distribution Center, or the Freescale web site listed on the back cover of this document. Topic DSP56300 Family Manual DSP56301 User’s Manual DSP56301 Technical Data Freescale Semiconductor Table 1. DSP56301 Documentation Description Detailed description of the DSP56300 family architecture and the 24-bit core processor and instruction set ...

Page 4

... Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale ...

Related keywords