GAL18V10B-7LJ Lattice, GAL18V10B-7LJ Datasheet

no-image

GAL18V10B-7LJ

Manufacturer Part Number
GAL18V10B-7LJ
Description
SPLD GAL Family 10 Macro Cells 111MHz EECMOS Technology 5V 20-Pin PLCC
Manufacturer
Lattice
Datasheet

Specifications of GAL18V10B-7LJ

Package
20PLCC
Family Name
GAL
Number Of Macro Cells
10
Maximum Propagation Delay Time
7.5 ns
Typical Operating Supply Voltage
5 V
Maximum Internal Frequency
111 MHz
Re-programmability Support
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
GAL18V10B-7LJ
Manufacturer:
LAT
Quantity:
6 250
Part Number:
GAL18V10B-7LJ
Manufacturer:
LAT
Quantity:
6 250
Part Number:
GAL18V10B-7LJ
Manufacturer:
MMC
Quantity:
95
Part Number:
GAL18V10B-7LJ
Manufacturer:
LATTICE
Quantity:
1 000
Part Number:
GAL18V10B-7LJ
Manufacturer:
LATTICE
Quantity:
20 000
GAL
September 2010
Product Change Notifications (PCNs) have been issued to discontinue all devices in this
data sheet.
The original datasheet pages have not been modified and do not reflect those changes.
Please refer to the table below for reference PCN and current product status.
Product Line
GAL18V10
®
18V10 Device Datasheet
5555 N.E. Moore Ct.
All Devices Discontinued!
GAL18V10B-7LJ
GAL18V10B-7LP
GAL18V10B-10LJ
GAL18V10B-10LP
GAL18V10B-15LJ
GAL18V10B-15LP
GAL18V10B-20LJ
GAL18V10B-20LP
Ordering Part Number
Hillsboro, Oregon 97124-6421
Internet: http://www.latticesemi.com
Phone (503) 268-8000
Product Status
Discontinued
FAX (503) 268-8347
Reference PCN
PCN#06-07
PCN#13-10

Related parts for GAL18V10B-7LJ

GAL18V10B-7LJ Summary of contents

Page 1

... Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes. Please refer to the table below for reference PCN and current product status. Product Line Ordering Part Number GAL18V10B-7LJ GAL18V10B-7LP GAL18V10B-10LJ GAL18V10B-10LP GAL18V10 GAL18V10B-15LJ ...

Page 2

... GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified. Copyright © 2003 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. ...

Page 3

... GAL18V10 Ordering Information Commercial Grade Specifications Discontinued per PCN #06-07. Contact Rochester Electronics for available inventory. Part Number Description GAL18V10B Device Name Speed (ns Low Power Power B B XXXXXXXX Specifications GAL18V10 Grade Blank = Commercial Package P = Plastic DIP J = PLCC ...

Page 4

Output Logic Macrocell (OLMC) The GAL18V10 has a variable number of product terms per OLMC. Of the ten available OLMCs, two OLMCs have access to ten prod- uct terms (pins 14 and 15), and the other eight OLMCs have eight ...

Page 5

Registered Mode ACTIVE LOW Combinatorial Mode ACTIVE LOW Specifications GAL18V10 ...

Page 6

GAL18V10 Logic Diagram/JEDEC Fuse Map 0000 0036 . . . 0324 0360 . . . 0648 2 0684 . . . 0972 3 1008 . . . 1296 4 1332 . . . . 1692 5 1728 ...

Page 7

... The leakage current is due to the internal pull-up on all pins. See Input Buffer section for more information. 2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester ground degradation. Characterized but not 100% tested. 3) Typical values are at Vcc = 5V and T Specifications GAL18V10B Recommended Operating Conditions (1) Commercial Devices: +1 ...

Page 8

... Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section. Capacitance ( 1.0 MHz) ° A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL18V10B Over Recommended Operating Conditions COM -7 MIN. MAX. — 7.5 — 5.5 — 3.5 5.5 — 0 — 90.9 — ...

Page 9

Switching Waveforms INPUT or I/O FEEDB ACK CO MB INA Combinatorial Output INPUT or I/O FEEDB ACK t dis Input or I/O to Output Enable/Disable ...

Page 10

Descriptions CLK LOGIC REGISTER ARRAY max with External Feedback 1/( Note: fmax with external feedback is cal- culated from measured tsu and tco. LOGIC REGISTER ARRAY max with No ...

Page 11

... TTL devices. The input and I/O pins also have built-in active pull-ups result, floating inputs will float to a TTL high (logic 1). However, Lattice Semiconductor recommends that all unused inputs and tri-stated I/O pins be connected to an adjacent active input, Vcc, or ground. ...

Page 12

Power-Up Reset INTERNAL REGISTER Q - OUTPUT ACTIVE LOW OUTPUT REGISTER ACTIVE HIGH OUTPUT REGISTER Circuitry within the GAL18V10 provides a reset signal to all reg- isters during power-up. All internal registers will have their Q outputs set low after ...

Page 13

... GAL18V10B: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0 ...

Page 14

... GAL18V10B: Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.75 0.5 0. Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 Vin (V) Voh vs Ioh Ioh(mA) Normalized Icc vs Temp 1 ...

Page 15

... GAL18V10B: Typical AC and DC Characteristic Diagrams Normalized Tpd vs. Vcc 1.3 1.2 1.1 1 0.9 0 -> -> H 0.7 4.5 4.75 5 5.25 5.5 Supply Voltage (V) Normalized Tpd vs. Temperature 1.3 1.2 1.1 1 0.9 0.8 0.7 - 100 -25 Ambient Temperature (°C) Delta Tpd vs Outputs Switching Max Max Outputs I vs ...

Related keywords