MAX3111ECWI-T Maxim Integrated Products, MAX3111ECWI-T Datasheet - Page 27

• Manufacturer Part Number: MAX3111ECWI-T
• Description: UART Interface IC
• Manufacturer: Maxim Integrated Products

Specifications of MAX3111ECWI-T

• Lead Free Status / Rohs Status: No

In 9-bit mode, the MAX3110E/MAX3111E is set up with
eight bits plus parity. The parity bit in all normal mes-
sages is clear but is set in an address-type message.
The MAX3110E/MAX3111E’s parity-interrupt mask gen-
erates an interrupt on high parity when enabled. When
the master sends an address message with the parity
bit set, all MAX3110E/MAX3111E nodes issue an inter-
rupt. All nodes then retrieve the received byte to com-
pare to their assigned address. Once addressed, the
node continues to process each received byte. If the
node was not addressed, it ignores all message traffic
until a new address is sent out by the master.
The parity/9th-bit interrupt is controlled only by the data
in the receive register and is not affected by data in the
FIFO, so the most effective use of the parity/9th-bit
interrupt is with FIFO disabled. With the FIFO disabled,
received non-address words can be ignored and not
even read from the UART. For more detailed informa-
tion on 9-bit mode, refer to the MAX3100 data sheet.
The MAX3110E/MAX3111E’s IrDA mode can be used
to communicate with other IrDA SIR-compatible
devices or to reduce power consumption in opto-isolat-
ed applications.
In IrDA mode, a bit period is shortened to 3/16 of a
baud period (1.61µs at 115,200 baud). A data zero is
transmitted as a pulse of light (TX pin = logic low, RX
pin = logic high), as shown in Figure 15.
In receive mode, the RX signal’s sampling is done
halfway into the transmission of a high level. The sam-
pling is done once (instead of three times, as in normal
mode). The MAX3110E/MAX3111E ignore pulses short-
er than approximately 1/16 of the baud period. The
IrDA device that is communicating with the MAX3110E/
MAX3111E must be set to transmit pulses at 3/16 of the
baud period. For compatibility with other IrDA devices,
set the format to 8-bit data, one stop, no parity. For
more detailed information on SIR IrDA mode, refer to
the MAX3100 data sheet.
Protected RS-232 Transceivers with Internal Capacitors
SPI/MICROWIRE-Compatible UART and ±15kV ESD-
______________________________________________________________________________________
SIR IrDA Mode
The MAX3110E/MAX3111E require basic layout tech-
niques and fundamental power supply considerations.
The minimum requirements include: (1) placing a 1µF
ceramic bypass capacitor as close as possible to V
preferably right next to the V
side of the PCB directly below the V
an internal ground plane within the PCB, returning all
circuit grounds to this ground plane, or using a ‘star’
ground technique where all circuit grounds are
returned to a common ground point at the ‘GND’ lead
of the IC; (3) ensuring that the power source to the IC
has a low inductive path and is high-frequency
bypassed to absorb ESD events with significant
changes in the supply voltage.
Figure 15. IrDA Timing
_____________________Considerations
NORMAL UART
NORMAL
IrDA
IrDA
Layout and Power-Supply
TX
TX
RX
RX
0
1
1
0
0
CC
1
1
UART FRAME
DATA BITS
lead or on the opposite
0
0
0
0
CC
1
1
1
1
lead; (2) using
0
0
1
1
CC
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