AD607-EB Analog Devices Inc, AD607-EB Datasheet
AD607-EB
Specifications of AD607-EB
Related parts for AD607-EB
AD607-EB Summary of contents
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... GSM, CDMA, TDMA, and TETRA Receivers Satellite Terminals Battery-Powered Communications Receivers GENERAL DESCRIPTION The AD607 low power receiver IF subsystem for opera- tion at input frequencies as high as 500 MHz and IFs from 400 kHz to 12 MHz. It consists of a mixer, IF amplifiers, I and Q demodulators, a phase-locked quadrature oscillator, and a biasing system with external power-down. The AD607’ ...
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... Sine Wave Input, Baseband Output From FDIN to VMID Sine Wave Input at Pin 10.7 MHz For Power Up on Logical High To PLL Locked Midgain 10.7 MHz Operation to 2.92 V Minimum Supply Voltage Operation to 4.5 V Minimum Supply Voltage –2– AD607ARS Min Typ Max Unit 500 MHz ± –15 dBm – ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD607 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... Supply to Mixer, Low Level IF, PLL, and Gain Control PIN CONNECTION 20-Lead SSOP (RS-20 VPS1 FDIN 2 19 FLTR COM1 3 18 PRUP IOUT 4 LOIP 17 QOUT 5 16 RFLO AD607 VPS2 TOP VIEW 6 15 RFHI DMIP (Not to Scale IFOP GREF 8 MXOP 13 COM2 9 12 VMID GAIN 10 IFHI ...
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... V S1 Figure 1. Mixer/Amplifier Test Set CHARACTERIZATION BOARD C RFHI MXOP LOIP IFHI IFOP IOUT DMIP FDIN PLL QOUT VPOS BIAS PRUP GAIN Figure 2. Mixer Noise Figure Test Set –5– AD607 HP8764B TEK1105 OUT IN1 OUT1 HP8765B IN2 OUT2 RF_IN PROBE SUPPLY ...
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... AD607 HP346B 28V NOISE NOISE SOURCE HP6633A VPOS VNEG IEEE SPOS SNEG DCPS DP8200 VPOS VNEG IEEE SPOS SNEG V REF HP8764B 50 0 HP8656B IEEE RF_OUT SYNTHESIZER HP3326A DCFM OUTPUT_1 IEEE OUTPUT_2 DUAL SYNTHESIZER HP6633A VPOS VNEG IEEE SPOS SNEG DCPS DP8200 ...
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... CHARACTERIZATION BOARD RFHI MXOP LOIP IFHI IFOP DMIP IOUT FDIN PLL QOUT VPOS BIAS PRUP GAIN CHARACTERIZATION BOARD MXOP RFHI LOIP IFHI IFOP DMIP IOUT FDIN PLL QOUT VPOS BIAS PRUP GAIN MXOP X HP8594E IFOP IEEE RF_IN SPEC AN IOUT QOUT AD607 ...
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... AD607 FL6082A RF_OUT IEEE MOD_OUT HP6633A VPOS VNEG IEEE SPOS SNEG DCPS DP8200 VPOS VNEG IEEE SPOS SNEG V REF HP8112 PULSE_OUT IEEE PULSE GENERATOR HP8656B IEEE RF_OUT SYNTHESIZER HP6633A VPOS VNEG IEEE SPOS SNEG DCPS CHARACTERIZATION BOARD MXOP RFHI LOIP P6205 ...
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... FDIN FET PROBE PLL P6205 QOUT X10 OUT IN2 VPOS FET PROBE PROBE SUPPLY BIAS PRUP GAIN Figure 11. Quadrature Accuracy Test Set –9– AD607 HP54120 1103 IN1 OUT1 CH1 CH2 CH3 IN2 OUT2 CH4 PROBE SUPPLY TRIG IEEE_488 DIGITAL OSCILLOSCOPE ...
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... IFHI 0.1 F *CONNECTIONS ARE DC-COUPLED. 4.99k R10 0.1 F C13 1 FDIN VPS1 0 2 COM1 FLTR R12 3 PRUP C10 IOUT 1nF 4 LOIP QOUT C16 AD607 5 RFLO 1nF VPS2 6 RFHI DMIP C9 1nF GREF 7 IFOP MXOP 8 COM2 9 VMID GAIN 10 IFHI IFLO 51.1 1nF Figure 12. Characterization Board – ...
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... V –15 – 100 150 200 250 300 350 400 450 500 550 RADIO FREQUENCY – MHz TPC 3. Mixer Conversion Gain vs. Frequency ° C, VPOS = 2.92 V, VREF = 1. 10.7 MHz REV. C Typical Performance Characteristics–AD607 –5 –10 190 210 230 250 TPC 4. Mixer Conversion Gain vs. IF ° C, VPOS = 3 V, VREF = 1 ...
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... AD607 0.3V GAIN 0.6V GAIN 1.2V GAIN 1.8V GAIN 2.4V GAIN 0 –10 0.1 1 INTERMEDIATE FREQUENCY – MHz TPC 7. IF Amplifier Gain vs. Frequency ° C, VPOS = 3 V, VREF = 1 –2 MIXER –4 –6 –8 –10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 GAIN VOLTAGE – V TPC 8 ...
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... TPC 16. Demodulator Gain vs. Supply Voltage 1.4 1.6 1.8 2.0 17 TPC 17. Demodulator Gain Histogram ° C, VPOS = 10.7 MHz –13– AD607 I_GAIN_CORR CUBIC FIT OF I_GAIN_CORR (TEMP) 3 3.5 4 4.5 5 5.5 SUPPLY – V 17.2 17.4 17.6 17.8 18 18.2 18.4 18.6 DEMODULATOR GAIN – ...
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... RFHI and RFLO up to which the mixer remains linear, and at the lower end by the noise level customary to define the linearity of a mixer in terms of the 1 dB gain-compression point and third order intercept, which for the AD607 are –15 dBm and –8 dBm, respectively Ω system. 2 2.5 VMID ...
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... IF amplifier’s linear range. IF Amplifier Most of the gain in the AD607 arises in the IF amplifier strip, which comprises four stages. The first three are fully differential and each has a gain span for the nominal AGC voltage range. Thus, in conjunction with the mixer’ ...
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... V (for general limit – 0.8 V). The gain of all stages changes in parallel. The AD607 P features temperature compensation of the gain scaling. The gain control scaling is proportional to the reference voltage applied to the Pin GREF. When this pin is tied to the midpoint of the supply (VMID), the scale is nominally 20 mV/dB (50 dB/V) for ...
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... The demodulators are driven by quadrature signals that are provided by a variable frequency quadrature oscillator (VFQO), phase-locked to a reference signal applied to Pin FDIN. When this signal is at the IF, in-phase and quadrature baseband outputs Table II. AD607 Gain and Manual Gain Control Voltage vs. Power Supply Voltage Power Supply GREF Voltage ...
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... Gain Distribution As in all receivers, the most critical decisions in effectively using AD607 the AD607 relate to the partitioning of gain between the various subsections (Mixer, IF Amplifier, Demodulators) and the place- FDIN ment of filters achieve the highest overall signal-to-noise ratio and lowest intermodulation distortion. ...
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... NORMAL OPERATING RANGE Figure 24. Gain Distribution for GREF = 1.23 V Using the AD607 with a Fast PRUP Control Signal If the AD607 is used in a system in which the PRUP signal (Pin 3) is applied with a rise time less than 35 µs, anomalous behavior occasionally occurs. The problem is intermittent will not occur every time the part is powered up under these conditions ...
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... C9 RFLO 1nF RFHI R6 GREF 51.1 R5 JUMPER MXOP R4 332 OPEN VMID R3 IFHI 332 C7 1nF AD607 EVALUATION BOARD (AS RECEIVED) VPOS R15 R13 50k 50k FDIN FDIN R12 OPEN Figure 26. Evaluation Board Figure 27a. Evaluation Board Layout, Topside –20– C1 0.1 F VPS1 C3 10nF R1 FLTR ...
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... Figure 27b. Evaluation Board Layout, Bottom Side Table III. AD607 Evaluation Board Input and Output Connections Reference Connector Designation Type Description J1 SMA Frequency Detector Input J2 SMA Power-Up J3 SMA LO Input J4 SMA RF Input J5 SMA MGC Input J6 SMA IF Output J7 SMA Q Output J8 SMA I Output J9 Jumper ...
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... AD607 In operation (Figure 28), the AD607 evaluation board draws about 8 midgain (59 dB). Use high impedance probes to monitor signals from the demodulated I and Q outputs and the IF output. The MGC voltage should be set such that the signal level at DMIP does not exceed ± 150 mV; signal levels ...
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... Shrink Small Outline Package [SSOP] (RS-20) Dimensions shown in millimeters 7.50 7.20 6. 8.20 5.60 7.80 5.30 7.40 5. 1.85 1.75 2.00 MAX 1.65 0.25 0.09 8 0.65 0.38 4 BSC 0.22 SEATING 0 PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-150AE –23– AD607 0.95 0.75 0.55 ...
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... AD607 Revision History Location 11/02—Data Sheet changed from REV REV. C. Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Changes to TPC Edits to PRODUCT OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Edits to IF Amplifier section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Edits to Gain Scaling and RSSI section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Edits to I/Q Demodulators section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Edits to Table Edits to Bias System ...