TDA7540B STMicroelectronics, TDA7540B Datasheet - Page 39

• Manufacturer Part Number: TDA7540B
• Manufacturer: STMicroelectronics

Specifications of TDA7540B

• Case: TQFP
• Dc: 06+
• Lead Free Status / Rohs Status: Compliant

DOCUMENT CD00108485
Copyright STMicroelectronics
TDA7540B
4.5.3
4.5.4
4.5.5
4.5.6
4.5.7
REVISION 1.0
Stop condition
A STOP condition is defined by a LOW to HIGH transition of the SDA while the SCL line is at
a stable HIGH level. This condition terminates the communication between the devices and
forces the bus-interface of the device into the initial condition.
Acknowledge
Indicates a successful data transfer. The transmitter will release the bus after sending 8 bits
of data. During the 9th clock cycle the receiver will pull the SDA line to LOW level to indicate
it receive the eight bits of data.
Data transfer
During data transfer the device samples the SDA line on the leading edge of the SCL clock.
Therefore, for proper device operation the SDA line must be stable during the SCL LOW to
HIGH transition.
Device addressing
To start the communication between two devices, the bus master must initiate a start
instruction sequence, followed by an eight bit word corresponding to the address of the
device it is addressing.
The most significant 6 bits of the slave address are the device type identifier.
The TDA7540 device type is fixed as "110001".
The next significant bit is used to address a particular device of the previous defined type
connected to the bus.
The state of the hardwired PIN 59 defines the state of this address bit. So up to two devices
could be connected on the same bus. When PIN 59 is connected to VCC2 and a resistor at
PIN 55 versus ground of about 5,6k Ohm the address bit “1” is selected. In this case the AM
part doesn’t work. Otherwise the address bit “0” is selected (FM and AM is working).
Therefor a double FM tuner concept is possible.
The last bit of the start instruction defines the type of operation to be performed:
The TDA7540 connected to the bus will compare their own hardwired address with the slave
address being transmitted, after detecting a START condition. After this comparison, the
TDA7540 will generate an "acknowledge" on the SDA line and will do either a read or a write
operation according to the state of R/W bit.
Write operation
Following a START condition the master sends a slave address word with the R/W bit set to
"0". The device will generate an "acknowledge" after this first transmission and will wait for a
second word (the word address field). This 8-bit address field provides an access to any of
the 64 internal addresses.
Upon receipt of the word address the TDA7540 slave device will respond with an
"acknowledge". At this time, all the following words transmitted to the TDA7540 will be
considered as Data. The internal address will be automatically incremented up to hex40 in
–
–
When set to "1", a read operation is selected
When set to "0", a write operation is selected
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Functional description
DATE 11-May-2006
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