ADUM1230BRWZ Analog Devices Inc, ADUM1230BRWZ Datasheet - Page 3

• Manufacturer Part Number: ADUM1230BRWZ
• Manufacturer: Analog Devices Inc

Specifications of ADUM1230BRWZ

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 105C
• Package Type: SOIC W
• Rad Hardened: No
• Lead Free Status / Rohs Status: Compliant

SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground. 4.5 V ≤ V
specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at T
V
Table 1.
Parameter
DC SPECIFICATIONS
SWITCHING SPECIFICATIONS
1
2
3
4
5
6
7
8
Short-circuit duration less than one second. Average power must conform to the limit shown in the Absolute Maximum Ratings section.
The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
t
measured from the 50% level of the rising edge of the V
Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between two channels of the same part when the inputs
are either both rising edges or falling edges. The supply voltages and the loads on each channel are equal.
Channel-to-channel matching, rising or falling edges is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
Part-to-part matching, rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
Part-to-part matching, rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input
is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
PHL
DD1
Input Supply Current (V
Output Supply Current (V
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Output Short-Circuit Pulsed Current
Minimum Pulse Width
Maximum Switching Frequency
Propagation Delay
Change vs. Temperature
Pulse Width Distortion, |t
Channel-to-Channel Matching,
Channel-to-Channel Matching,
Part-to-Part Matching, Rising or Falling Edges
Part-to-Part Matching, Rising vs. Falling Edges
Output Rise/Fall Time (10% to 90%)
propagation delay is measured from the 50% level of the falling edge of the V
Quiescent
10 Mbps
Quiescent
10 Mbps
Rising or Falling Edges
Rising vs. Falling Edges
= 5 V, V
DDA
= 15 V, and V
4
2
DD1
PLH
5
DDA
6
Pins)
− t
DDB
and V
PHL
3
= 15 V.
|
DDB
1
Pins)
Ix
7
8
signal to the 50% level of the rising edge of the V
Symbol
I
I
I
I
I
V
V
V
V
I
PW
t
PWD
t
DDI (Q)
DDI (10)
DDA (Q)
DDA (10)
IA
OA (SC)
PHL
R
IH
IL
OAH
OAL
/t
, I
, t
F
IB
, V
, V
, I
PLH
, I
DD1
, I
, I
DISABLE
OBL
OBH
OB (SC)
DDB (Q)
DDB (10)
≤ 5.5 V, 12 V ≤ V
Rev. B | Page 3 of 12
Ix
signal to the 50% level of the falling edge of the V
Min
−10
2.0
V
V
100
10
97
DDA
DDB
− 0.1
− 0.1,
DDA
≤ 18 V, and 12 V ≤ V
Typ
2.9
5.2
0.3
16
+0.01
V
124
100
DDA
, V
Ox
DDB
signal.
Max
4.0
8.0
1.2
22
+10
0.8
0.1
80
160
8
5
13
55
63
20
DDB
≤ 18 V. All minimum/maximum
Unit
mA
mA
mA
mA
μA
V
V
V
V
mA
ns
Mbps
ns
ps/°C
ns
ns
ns
ns
ns
ns
Ox
signal. t
Test Conditions
C
0 ≤ V
I
I
C
C
C
C
C
C
C
C
C
OA
OA
L
L
L
L
L
L
L
L
L
L
, I
, I
= 200 pF, input t
= 200 pF, input t
= 200 pF
= 200 pF
= 200 pF
= 200 pF
= 200 pF
= 200 pF
= 200 pF
= 200 pF
OB
OB
IA
PLH
, V
= −1 mA
= +1 mA
propagation delay is
ADuM1230
IB
, V
A
DISABLE
= 25°C,
≤ V
R
R
= 3 ns
= 3 ns
DD1