ELANSC400-66AI AMD (ADVANCED MICRO DEVICES), ELANSC400-66AI Datasheet - Page 93

• Manufacturer Part Number: ELANSC400-66AI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC400-66AI

• Cpu Family: Elan
• Device Core Size: 16/32Bit
• Frequency (max): 66MHz
• Interface Type: ISA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 95C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 292
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

Symbol
t16a
t16b
t17a
t17b
t21a
t21b
t24a
t24b
t2a
t2b
t2c
t10
t11
t12
t13
t14
t15
t18
t19
t20
t22
t23
t25
t26
t27
t28
t29
t1
t3
t4
t5
t6
t7
t8
t9
Parameter Description
SA3–SA0 delay from SA31–SA4
SA stable to ROMCSx assertion
SA stable to ROMCSx assertion
when qualified with command (ROMRD or ROMWR)
SA stable to ROMCSx assertion
when qualified with command (ROMRD or ROMWR)
ROMCSx deassertion to SA change
SD setup to ROMRD or ROMCSx deassertion or burst address
switching, whichever is first, for 8-/16-/32-bit device
ROMWR setup to ROMCSx
Data hold from SA, ROMRD, or ROMCSx change, whichever is first
ROMCSx pulse width
DBUFOE, R32BFOE setup to ROMRD, ROMWR Low
ROMRD pulse width
SA3–SA0 burst address valid duration
ROMWR pulse width
SD setup to ROMWR assertion for 32-bit device
SD hold from ROMWR deassertion
SA hold from ROMWR deassertion
ROMRD delay from SA stable
ROMRD, ROMWR pulse width for 8-bit device
ROMRD, ROMWR pulse width for 16-bit device
Data setup from ROMRD for 8-bit device
Data setup from ROMRD for 16-bit device
ROMRD deassertion to SA unstable
Data hold from ROMRD deassertion
SA hold from ROMWR deassertion
SD setup to ROMWR assertion for 16-bit device
SD setup to ROMWR assertion for 8-bit device
SD hold from ROMWR deassertion
IOCHRDY assertion to ROMRD, ROMWR deassertion
IOCHRDY deassertion from ROMRD, ROMWR for 8-bit
IOCHRDY deassertion from ROMRD, ROMWR for 16-bit
R32BFOE/DBUFOE hold from ROMRD High
R32BFOE/DBUFOE hold from ROMWR High
DBUFRDL, DBUFRDH setup to ROMRD, ROMWR Low
DBUFRDL, DBUFRDH hold from ROMRD High
DBUFRDL, DBUFRDH hold from ROMWR high
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
Table 36. ROM/Flash Memory Cycles
Notes
2, 4
2, 4
1
1
1
1
2
2
3
3
3
3
2
2
2
2
2
2
2
External Bus
Min
100
530
240
125
115
-29
20
53
15
25
25
25
25
20
20
20
53
33
26
26
26
0
0
0
0
0
33-MHz
Max
489
209
378
17
66
-8
-8
6
6
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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