AM29F400BT-90SD Spansion Inc., AM29F400BT-90SD Datasheet - Page 17

• Manufacturer Part Number: AM29F400BT-90SD
• Manufacturer: Spansion Inc.

Specifications of AM29F400BT-90SD

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 19/18Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: SO
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 512K/256K
• Supply Current: 50mA
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Compliant

µs, otherwise the last address and command might not
be accepted, and erasure may begin. It is recom-
mended that processor interrupts be disabled during
this time to ensure all commands are accepted. The
interrupts can be re-enabled after the last Sector Erase
command is written. If the time between additional
sector erase commands can be assumed to be less
than 50 µs, the system need not monitor DQ3. Any
command other than Sector Erase or Erase
Suspend during the time-out period resets the
device to reading array data. The system must
rewrite the command sequence and any additional
sector addresses and commands.
The system can monitor DQ3 to determine if the sector
erase timer has timed out. (See the “DQ3: Sector Erase
Timer” section.) The time-out begins from the rising
edge of the final WE# pulse in the command sequence.
August 3, 2009 21505E7
D A T A
Am29F400B
S H E E T
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other commands
are ignored. Note that a hardware reset during the
sector erase operation immediately terminates the
operation. The Sector Erase command sequence
should be reinitiated once the device has returned to
reading array data, to ensure data integrity.
When the Embedded Erase algorithm is complete, the
device returns to reading array data and addresses are
no longer latched. The system can determine the
status of the erase operation by using DQ7, DQ6, DQ2,
or RY/BY#. (Refer to “The Erase Resume command is
valid only during the Erase Suspend mode.” for infor-
mation on these status bits.)
Figure 3 illustrates the algorithm for the erase opera-
tion. Refer to the “Erase/Program Operations” tables in
the “AC Characteristics” section for parameters, and to
Figure 14 for timing diagrams.
15