AM29LV033C-90EI Spansion Inc., AM29LV033C-90EI Datasheet - Page 18

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AM29LV033C-90EI

Manufacturer Part Number
AM29LV033C-90EI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV033C-90EI

Cell Type
NOR
Density
32Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
22b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
4M
Supply Current
16mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant

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Quantity
Price
Part Number:
AM29LV033C-90EI
Manufacturer:
AMD
Quantity:
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Part Number:
AM29LV033C-90EI
Manufacturer:
AMD
Quantity:
20 000
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadver tent writes (refer to
page 25
lowing hardware data protection measures prevent ac-
cidental erasure or programming, which might
otherwise be caused by spurious system level signals
during V
from system noise.
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets. Subsequent writes are ignored
until V
COMMON FLASH MEMORY INTERFACE (CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h, any time the device is ready to read array data.
The system can read CFI information at the addresses
given in Tables
16
Addresses
CC
CC
1Ah
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
CC
CC
for command definitions). In addition, the fol-
is greater than V
Write Inhibit
is less than V
power-up and power-down transitions, or
Table 5, on page 18
LKO
Data
51h
52h
59h
02h
00h
40h
00h
00h
00h
00h
00h
LKO
, the device does not ac-
. The system must pro-
Table 5. CFI Query Identification String
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
to
Table 9, on
Table 8, on
D A T A
Am29LV033C
CC
S H E E T
vide the proper signals to the control pins to prevent
unintentional writes when V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to reading array data on power-up.
page
must write the reset command.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in
on page
mand to return the device to the autoselect mode.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the World
Wide Web at http://www.amd.com/products/nvd/over-
view/cfi.html. Alternatively, contact an AMD represen-
tative for copies of these documents.
IL
, CE# = V
20. To terminate reading CFI data, the system
20. The system must write the reset com-
Description
IH
or WE# = V
IL
and OE# = V
22268B5 September 12, 2006
IH
CC
. To initiate a write cycle,
is greater than V
IH
Table 5
during power up,
to
Table 8,
LKO
.

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