AM29LV128MH123REI Spansion Inc., AM29LV128MH123REI Datasheet - Page 30

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AM29LV128MH123REI

Manufacturer Part Number
AM29LV128MH123REI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV128MH123REI

Cell Type
NOR
Density
128Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
24/23Bit
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
3/11.5 to 12.5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
16M/8M
Supply Current
43mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
Enter Secured Silicon Sector/Exit Secured
Silicon Sector Command Sequence
The Secured Silicon Sector region provides a secured
data area containing an 8-word/16-byte random Elec-
tronic Serial Number (ESN). The system can access
the Secured Silicon Sector region by issuing the
three-cycle Enter Secured Silicon Sector command
sequence. The device continues to access the Se-
cured Silicon Sector region until the system issues the
four-cycle Exit Secured Silicon Sector command se-
quence. The Exit Secured Silicon Sector command
sequence returns the device to normal operation.
Table 10
quirements for both command sequences. See also
“Secured Silicon Sector Flash Memory Region”
page 24 for further information. Note: The write buffer,
ACC function, and unlock bypass modes are not avail-
able when the Secured Silicon Sector is enabled.
Word Program Command Sequence
Programming is a four-bus-cycle operation. The pro-
gram command sequence is initiated by writing two
unlock write cycles, followed by the program set-up
command. The program address and data are written
next, which in turn initiate the Embedded Program al-
gorithm. The system is not required to provide further
controls or timings. The device automatically provides
internally generated program pulses and verifies the
programmed cell margin.
the address and data requirements for the word pro-
gram command sequence.
When the Embedded Program algorithm is complete,
the device then returns to the read mode and ad-
dresses are no longer latched. The system can deter-
mine the status of the program operation by using
DQ7 or DQ6. See
page 39 for information on these status bits.
Any commands written to the device during the Em-
bedded Program Algorithm are ignored. Note that a
hardware reset immediately terminates the program
operation. The program command sequence should
be reinitiated once the device has returned to the read
mode, to ensure data integrity. Note that the Secured
Silicon Sector, autoselect, and CFI functions are un-
available when a program operation is in progress.
Programming is allowed in any sequence and across
sector boundaries. A bit cannot be programmed
from “0” back to a “1.” Attempting to do so may
cause the device to set DQ5 = 1, or cause the DQ7
and DQ6 status bits to indicate the operation was suc-
cessful. However, a succeeding read will show that the
30
and
Table 11
“Wr ite Operation Status”
show the address and data re-
Table 10
and
Table 11
D A T A
Am29LV128MH/L
show
on
on
S H E E T
data is still “0.” Only erase operations can convert a “0”
to a “1.”
Note: Single byte programming is not supported in x8-mode.
Write buffer programming must be used during x8-mode
operation.
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram words to the device faster than using the stan-
dard program command sequence. The unlock bypass
command sequence is initiated by first writing two un-
lock cycles. This is followed by a third write cycle con-
taining the unlock bypass command, 20h. The device
then enters the unlock bypass mode. A two-cycle un-
lock bypass program command sequence is all that is
required to program in this mode. The first cycle in this
sequence contains the unlock bypass program com-
mand, A0h; the second cycle contains the program
address and data. Additional data is programmed in
the same manner. This mode dispenses with the initial
two unlock cycles required in the standard program
command sequence, resulting in faster total program-
ming time.
ments for the command sequence.
During the unlock bypass mode, only the Unlock By-
pass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset com-
mand sequence. The first cycle must contain the data
90h. The second cycle must contain the data 00h. The
device then returns to the read mode.
Write Buffer Programming
Write Buffer Programming allows the system write to a
maximum of 16 words/32 bytes in one programming
operation. This results in faster effective programming
time than the standard programming algorithms. The
Write Buffer Programming command sequence is initi-
ated by first writing two unlock cycles. This is followed
by a third write cycle containing the Write Buffer Load
command written at the Sector Address in which pro-
gramming will occur. The fourth cycle writes the sector
address and the number of word locations, minus one,
to be programmed. For example, if the system will pro-
gram 6 unique address locations, then 05h should be
written to the device. This tells the device how many
write buffer addresses will be loaded with data and
therefore when to expect the Program Buffer to Flash
command. The number of locations to program cannot
exceed the size of the write buffer or the operation will
abort.
The fifth cycle writes the first address location and
data to be programmed. The write-buffer-page is se-
lected by address bits A
d r e s s / d a t a
selected-write-buffer-page. The system then writes the
Table 10
p a i r s
and
m u s t
MAX
Table 11
–A
25270C7 January 31, 2007
4
. All subsequent ad-
fa l l
show the require-
w i t h i n
t h e

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