CY7C1019CV33-15ZC Cypress Semiconductor Corp, CY7C1019CV33-15ZC Datasheet

CY7C1019CV33-15ZC

Manufacturer Part Number
CY7C1019CV33-15ZC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1019CV33-15ZC

Density
1Mb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
70mA
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Cypress Semiconductor Corporation
Document #: 38-05130 Rev. *F
Features
Functional Description
The CY7C1019CV33 is a high-performance CMOS static
RAM organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and tri-state drivers. This
• Pin and function compatible with CY7C1019BV33
• High speed
• CMOS for optimum speed/power
• Data retention at 2.0V
• Center power/ground pinout
• Automatic power-down when deselected
• Easy memory expansion with CE and OE options
• Available in Pb-free and non Pb-free 48-ball VFBGA,
Logic Block Diagram
WE
CE
OE
— t
32-pin TSOP II and 400-mil SOJ package
A
A
A
A
A
A
A
A
A
AA
0
1
2
3
4
5
6
7
8
= 10 ns
INPUT BUFFER
128K x 8
DECODER
COLUMN
ARRAY
POWER
DOWN
198 Champion Court
device has an automatic power-down feature that significantly
reduces power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1019CV33 is available in Standard 48-ball FBGA,
32-pin TSOP II and 400-mil-wide SOJ packages
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
0
San Jose
through I/O
V
I/O
I/O
V
I/O
I/O
WE
,
128K x 8 Static RAM
CE
CC
A
A
A
A
A
A
A
A
SS
Pin Configuration
CA 95134-1709
7
0
1
2
0
1
2
3
4
5
6
3
7
) is then written into the location
SOJ/TSOP II
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
Top View
0
0
through I/O
Revised August 3, 2006
through A
CY7C1019CV33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
7
A
A
A
A
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
) are placed in a
).
SS
CC
16
15
14
13
12
11
10
9
8
408-943-2600
7
6
5
4
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Related parts for CY7C1019CV33-15ZC

CY7C1019CV33-15ZC Summary of contents

Page 1

... I/O pins. The eight input/output pins (I/O high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1019CV33 is available in Standard 48-ball FBGA, 32-pin TSOP II and 400-mil-wide SOJ packages I/O 0 I/O 1 ...

Page 2

... Pin Configuration Selection Guide Maximum Access Time Maximum Operating Current Maximum Standby Current Note pins are not connected on the die. Document #: 38-05130 Rev. *F 48-ball VFBGA (Top View I/O NC I -10 - CY7C1019CV33 -15 Unit Page [+] Feedback ...

Page 3

... MAX , 5 CC – 0.3V, CC > V – 0.3V, CC < 0.3V Test Conditions T = 25° MHz 5.0V CC CY7C1019CV33 Ambient Temperature V CC 3.3V ± 10% 0°C to +70°C 3.3V ± 10% –40°C to +85°C –12 –15 Min. Max. Min. Max. Unit 2.4 2.4 0.4 ...

Page 4

... The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t Document #: 38-05130 Rev. *F [4] ALL INPUT PULSES 90% 90% 10% (b) Fall Time: 1 V/ns [5] -10 Min. Max. Min less than less than t , and t HZCE LZCE HZOE LZOE and t HZWE CY7C1019CV33 High-Z characteristics: R 317Ω 3.3V 10% OUTPUT 5 pF (c) -12 -15 Max. Min. Max. Unit ...

Page 5

... Data I/O is high impedance 15 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05130 Rev OHA DOE DATA VALID 50 SCE SA t SCE PWE t SD DATA VALID CY7C1019CV33 DATA VALID t HZOE t HZCE HIGH IMPEDANCE t PD ICC 50% ISB Page [+] Feedback ...

Page 6

... During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05130 Rev. *F [14, 15 SCE PWE t SD DATA VALID IN [15 SCE PWE t SD DATA VALID Mode 7 Power-Down Read Write Selected, Outputs Disabled CY7C1019CV33 LZWE Power Standby ( Active ( Active ( Active ( Page [+] Feedback ...

Page 7

... Ordering Code 10 CY7C1019CV33-10VC CY7C1019CV33-10ZXC CY7C1019CV33-10ZXI 12 CY7C1019CV33-12VC CY7C1019CV33-12ZC CY7C1019CV33-12ZXC CY7C1019CV33-12VI CY7C1019CV33-12BVXI 15 CY7C1019CV33-15VC CY7C1019CV33-15VXC CY7C1019CV33-15ZXC CY7C1019CV33-15ZXI Package Diagrams Document #: 38-05130 Rev. *F Package Diagram Package Type 51-85033 32-pin 400-Mil Molded SOJ 51-85095 32-pin TSOP II (Pb-Free) 32-pin TSOP II (Pb-Free) 51-85033 32-pin 400-Mil Molded SOJ ...

Page 8

... Package Diagrams (continued) Document #: 38-05130 Rev. *F 32-pin TSOP II (51-85095) CY7C1019CV33 51-85095-** Page [+] Feedback ...

Page 9

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 48-ball VFBGA ( mm) (51-85150) A CY7C1019CV33 BOTTOM VIEW A1 CORNER Ø0. Ø ...

Page 10

... Document History Page Document Title: CY7C1019CV33 128K x 8 Static RAM Document Number: 38-05130 Issue REV. ECN NO. Date ** 109245 12/16/01 *A 113431 04/10/02 *B 115047 08/01/02 *C 119796 10/11/02 *D 123030 12/17/02 *E 419983 See ECN *F 493543 See ECN Document #: 38-05130 Rev. *F Orig. of Change Description of Change HGK ...

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