CY62138VLL-70BAI Cypress Semiconductor Corp, CY62138VLL-70BAI Datasheet

no-image

CY62138VLL-70BAI

Manufacturer Part Number
CY62138VLL-70BAI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62138VLL-70BAI

Density
2Mb
Access Time (max)
70ns
Package Type
FBGA
Operating Temp Range
-40C to 85C
Supply Current
15mA
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Word Size
8b
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62138VLL-70BAI
Manufacturer:
CYP
Quantity:
20 000
Company:
Part Number:
CY62138VLL-70BAI
Quantity:
886
Part Number:
CY62138VLL-70BAIT
Manufacturer:
UJU
Quantity:
7 223
Features
Functional Description
The CY62138V is a high-performance CMOS static RAM or-
ganized as 262,144 words by 8 bits. This device features ad-
vanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Life™ (MoBL™) in portable
applications such as cellular telephones. The device also has
an automatic power-down feature that reduces power con-
More Battery Life and MoBL are trademarks of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation
• Low voltage range:
• Ultra-low active power
• Low standby power
• Easy memory expansion with CS
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
CS
CS
Logic Block Diagram
WE
OE
— 2.7–3.6V
1
2
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
Data in Drivers
DECODER
COLUMN
ARRAY
256K x 8
POWER
DOWN
1
/CS
2
and OE features
3901 North First Street
62138V-1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
sumption by 99% when addresses are not toggling. The device
can be put into standby mode when deselected (CS
CS
Writing to the device is accomplished by taking Chip Enable
One (CS
able Two (CS
I/O
pins (A
Reading from the device is accomplished by taking Chip En-
able One (CS
Write Enable (WE) and Chip Enable Two (CS
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CS
HIGH or CS
during a write operation (CS
The CY62138V is available in a 36-ball FBGA.
7
2
) is then written into the location specified on the address
LOW).
0
through A
1
) and Write Enable (WE) inputs LOW and Chip En-
Pin Configuration
San Jose
2
2
) HIGH. Data on the eight I/O pins (I/O
1
LOW), the outputs are disabled (OE HIGH), or
) and Output Enable (OE) LOW while forcing
I/O
V
V
I/O
I/O
I/O
A
A
1
SS
CC
9
0
6
7
4
5
17
256K x 8 Static RAM
).
A
A
OE
A
2
1
2
10
CY62138V MoBL™
CS
WE
TOP View
1
NC
CS
A
NC
3
LOW, CS
CA 95134
11
FBGA
2
1
0
62138V–2
through I/O
A
A
A
A
A
A
4
17
16
12
4
3
5
2
HIGH, and WE LOW).
A
A
A
A
5
15
7
13
6
January 20, 2000
7
) are placed in a
V
2
I/O
I/O
A
V
I/O
I/O
A
) HIGH. Under
CC
6
SS
408-943-2600
8
14
0
1
2
3
1
0
HIGH or
through
B
C
D
E
F
G
H
A
1

Related parts for CY62138VLL-70BAI

CY62138VLL-70BAI Summary of contents

Page 1

... CS DOWN 1 DECODER More Battery Life and MoBL are trademarks of Cypress Semiconductor Corporation. Cypress Semiconductor Corporation sumption by 99% when addresses are not toggling. The device can be put into standby mode when deselected (CS CS LOW). 2 Writing to the device is accomplished by taking Chip Enable One (CS ...

Page 2

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature Ambient Temperature with Power Applied Supply Voltage to Ground Potential DC Voltage Applied to Outputs [1] in High Z State Product Portfolio ...

Page 3

AC Test Loads and Waveforms OUTPUT INCLUDING JIG AND SCOPE 62138V–3 Equivalent to: THÉ VENIN EQUIVALENT RTH OUTPUT Parameters 3.0V R1 1105 R2 1550 R 645 TH V 1.75 TH Data Retention Characteristics Parameter ...

Page 4

Switching Characteristics Over the Operating Range Parameter READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW to Data Valid ACE t OE LOW to Data Valid ...

Page 5

Switching Waveforms (continued) [5., 11, 12] Read Cycle No ACE OE t LZOE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT [5, 8, 13, 14] Write Cycle No. 1 (WE Controlled) ADDRESS CE ...

Page 6

Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS DATA I/O NOTE 15 t HZWE [ DATA VALID IN 6 CY62138V MoBL™ ...

Page 7

Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 1.2 1 0.8 0 typ = 0.4 0.2 0.0 1.7 2.2 2.7 3.2 SUPPLY VOLTAGE (V) NORMALIZED STANDBY CURRENT ...

Page 8

... Speed (ns) Ordering Code 70 CY62138VLL-70BAI Document #: 38–00729–*B Package Diagram © Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...

Related keywords