CY62128-70SC Cypress Semiconductor Corp, CY62128-70SC Datasheet

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CY62128-70SC

Manufacturer Part Number
CY62128-70SC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62128-70SC

Density
1Mb
Access Time (max)
70ns
Operating Supply Voltage (typ)
5V
Package Type
SOIC
Operating Temp Range
0C to 70C
Supply Current
110mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62128-70SC
Manufacturer:
CYP
Quantity:
4 600
Part Number:
CY62128-70SCT
Manufacturer:
ST
0
Features
Functional Description
The CY62128 is a high-performance CMOS static RAM orga-
nized as 131,072 words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE
chip enable (CE
three-state drivers. This device has an automatic power-down
Cypress Semiconductor Corporation
• 4.5V
• CMOS for optimum speed/power
• Low active power (70 ns, LL version)
• Low standby power (70 ns, LL version)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
Logic Block Diagram
WE
CE
CE
OE
— 330 mW (max.) (60 mA)
— 110 W (max.) (20 A)
1
2
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
5.5V operation
2
), an active LOW output enable (OE), and
INPUT BUFFER
512 x 256 x 8
DECODER
COLUMN
ARRAY
1
, CE
POWER
DOWN
2
1
, and OE options
), an active HIGH
3901 North First Street
PRELIMINARY
62128-1
feature that reduces power consumption by more than 75%
when deselected.
Writing to the device is accomplished by taking chip enable
one (CE
two (CE
I/O
pins (A
Reading from the device is accomplished by taking chip en-
able one (CE
write enable (WE) and chip enable two (CE
these conditions, the contents of the memory location speci-
fied by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH or CE
during a write operation (CE
The CY62128 is available in a standard 400-mil-wide SOJ,
525-mil wide (450-mil-wide body width) SOIC and 32-pin
TSOP type I.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
7
) is then written into the location specified on the address
0
1
2
3
4
5
6
7
0
2
1
CE
V
through A
) input HIGH. Data on the eight I/O pins (I/O
A
A
WE
A
A
A
A
NC
) and write enable (WE) inputs LOW and chip enable
A
A
CC
A
A
A
A
11
13
15
16
14
12
9
8
2
7
6
5
4
San Jose
2
1
LOW), the outputs are disabled (OE HIGH), or
) and output enable (OE) LOW while forcing
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
16
128K x 8 Static RAM
).
Pin Configurations
July 1996 - Revised November 1996
GND
I/O
I/O
I/O
A
A
A
NC
A
A
A
A
A
A
A
A
1
16
14
12
6
5
4
3
2
1
0
0
1
2
7
(not to scale)
CA 95134
LOW, CE
SOJ / SOIC
Top View
Top View
0
TSOP I
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
through I/O
2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
HIGH, and WE LOW).
CE
A
CE
I/O
I/O
I/O
I/O
I/O
V
A
WE
A
A
A
A
OE
CC
10
15
13
8
9
11
7
7
6
5
4
3
2
1
) are placed in a
CY62128
2
fax id: 1072
) HIGH. Under
408-943-2600
62128-2
0
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
through
OE
A
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
10
0
1
2
3
1
7
6
5
4
3
2
1
0
1

Related parts for CY62128-70SC

CY62128-70SC Summary of contents

Page 1

... TTL-compatible inputs and outputs • Easy memory expansion with Functional Description The CY62128 is a high-performance CMOS static RAM orga- nized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE chip enable ( active LOW output enable (OE), and 2 three-state drivers ...

Page 2

... MAX RC Max Com’ < MAX Max Com’ – 0.3V 0.3V – 0.3V 0.3V, f CY62128 CY62128–55 CY62128– 115 mA 110 100 A 100 Ambient [2] Temperature + 10% 62128–55 62128–70 Min. Max. Min. Max. Unit 2.4 2.4 0.4 0 0.3 0.3 – ...

Page 3

... HIGH to Low Z 2 [7, 8] LOW to High Z 2 HIGH to Power-Up 2 LOW to Power-Down 2 HIGH to Write End 2 is less than less than t HZCE LZCE HZOE LZOE LOW, CE HIGH, and WE LOW CY62128 Max ALL INPUT PULSES 90% 10% 5ns 62128–55 62128–70 Min. Max. Min. Max ...

Page 4

... Address valid prior to or coincident with CE PRELIMINARY Over the Operating Range (continued) Description OHA ACE t DOE LZOE 50 transition LOW and CE transition HIGH CY62128 62128–55 62128–70 Min. Max. Min. Max DATA VALID t HZOE t HZCE IMPEDANCE DATA VALID t PD 50% Unit 62128-5 HIGH ICC ...

Page 5

... LOW simultaneously with WE going HIGH, the output remains in a high-impedance state 15. During this period the I/Os are in the output state and input signals should not be applied. PRELIMINARY [13,14 SCE SCE PWE t SD DATA VALID [13,14 SCE t SCE PWE t SD DATA VALID IN 5 CY62128 62128 62128-8 ...

Page 6

... High Z Ordering Information Speed Package (ns) Ordering Code 55 CY62128–55VC CY62128–55SC CY62128 55ZC 70 CY62128–70VC CY62128–70SC CY62128 70ZC CY62128L 70SC CY62128L 70ZC CY62128LL 70SC CY62128LL 70ZC Shaded area contains advanced information. Document #: 38–00524 PRELIMINARY [13,14 SCE t SCE PWE t SD DATA VALID ...

Page 7

... Package Diagrams PRELIMINARY 32-Lead (450 Mil) Molded SOIC S34 32-Lead Thin Small Outline Package Z32 7 CY62128 ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY 32-Lead (400-Mil) Molded SOJ V33 CY62128 ...

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