LH28F400SUE-NC80 Sharp Electronics, LH28F400SUE-NC80 Datasheet

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LH28F400SUE-NC80

Manufacturer Part Number
LH28F400SUE-NC80
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F400SUE-NC80

Cell Type
NOR
Density
4Mb
Access Time (max)
80ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
19/18Bit
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP-I
Program/erase Volt (typ)
4.5 to 5.5V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8/16Bit
Number Of Words
512K/256K
Supply Current
60mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
LH28F400SU-NC
FEATURES
User-Configurable x8 or x16 Operation
5 V Write/Erase Operation (5 V V
– No Requirement for DC/DC Converter
60 ns Maximum Access Time
(V
80ns Maximum Access Time
(V
32 Independently Lockable Blocks (16K)
100,000 Erase Cycles per Block
Automated Byte Write/Block Erase
– Command User Interface
– Status Register
– RY
System Performance Enhancement
– Erase Suspend for Read
– Two-Byte Write
– Full Chip Erase
Data Protection
– Hardware Erase/Write Lockout during
– Software Erase/Write Lockout
Independently Lockable for Write/Erase
on Each Block (Lock Block and Protect
Set/Reset)
5 µA (Typ.) I
0.2 µA (Typ.) Deep Power-Down
State-of-the-Art 0.45 µm ETOX™ Flash
Technology
56-Pin, 1.2 mm × 14 mm × 20 mm TSOP
(Type I) Package
48-Pin, 1.2 mm × 12 mm × 18 mm TSOP
(Type I) Package
44-Pin, 600-mil SOP Package
to Write/Erase
CC
CC
Power Transitions
    »
/ BY
= 5.0 V ± 0.25 V)
= 5.0 V ± 0.5 V)
    »
Status Output
CC
in CMOS Standby
PP
)
56-PIN TSOP
RY/BY
V
WE
A
A
A
A
A
A
A
NC
NC
NC
NC
NC
NC
NC
RP
NC
A
A
A
A
A
A
A
A
PP
A
Figure 1. 56-Pin TSOP Configuration
15
14
13
12
11
10
17
9
8
7
6
5
4
3
2
1
10
12
13
14
15
16
17
18
19
20
22
23
24
25
26
27
28
11
21
2
3
4
5
6
7
8
9
1
4M (512K × 8, 256K × 16)
Flash Memory
29
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
28F400SUT-NC60-1
DQ
DQ
DQ
DQ
TOP VIEW
NC
A
BYTE
GND
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
V
V
DQ
DQ
DQ
DQ
OE
GND
CE
A
NC
NC
16
CC
CC
0
3
10
2
9
15
7
14
6
13
5
12
4
11
1
8
0
/A
-1
1

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LH28F400SUE-NC80 Summary of contents

Page 1

... Each Block (Lock Block and Protect Set/Reset) • 5 µA (Typ CMOS Standby CC • 0.2 µA (Typ.) Deep Power-Down • State-of-the-Art 0.45 µm ETOX™ Flash Technology • 56-Pin, 1.2 mm × × TSOP (Type I) Package • 48-Pin, 1.2 mm × × TSOP (Type I) Package • ...

Page 2

... LH28F400SU-NC 48-PIN TSOP RY/ Figure 2. 48-Pin TSOP Configuration 2 4M (512K × 8, 256K × 16) Flash Memory TOP VIEW 44-PIN SOP RP/BY BYTE 47 46 GND GND GND Figure 3. 44-Pin SOP Configuration 0 28F400SUT-NC60-24 TOP VIEW BYTE 32 GND 28F400SUT-NC60-23 ...

Page 3

... Flash Memory OUTPUT BUFFER OUTPUT MULTIPLEXER INPUT -1,0 17 BUFFER Y-DECODER ADDRESS X-DECODER QUEUE LATCHES ADDRESS COUNTER Figure 4. LH28F400SU-NC Block Diagram OUTPUT INPUT BUFFER BUFFER DATA ID QUEUE REGISTER REGISTERS CSR REGISTER ESRs DATA COMPARATOR Y GATING/SENSING . . . . . . LH28F400SU-NC INPUT BUFFER ...

Page 4

... WSM operation(s) are terminated, » is high and float. Address then becomes the lowest order address (512K × 8, 256K × 16) Flash Memory » is » » pin is floated. selects between the high -1 -1 ...

Page 5

... V systems. Its x8/x16 architecture allows the optimization of memory to processor interface. The flexible block locking option enables bundling of execut- able application software in a Resident Flash Array or memory card. Manufactured on Sharp’s 0.45 µm ETOX™ process technology, the LH28F400SU-NC is the most cost-effective, high-density 5.0 V flash memory. ...

Page 6

... CE transitions high and RP stays high with all input control pins at CMOS levels. In this mode, the device draws an I standby current of 10 µ (512K × 8, 256K × 16) Flash Memory MEMORY MAP 7FFFFH 16KB BLOCK 7C000H 7BFFFH 16KB BLOCK 78000H 77FFFH ...

Page 7

... Flash Memory BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS Bus Operations for Word-Wide Mode (BY MODE RP » CE » Read Output Disable Standby Deep Power-Down Manufacturer Device Write Bus Operations for Byte-Wide Mode (BY » » MODE RP CE Read Output Disable ...

Page 8

... A 1 WDL looks at the WDH. In word-wide (x16) mode Second bus cycle address of Protect Set/Confirm and Protect Reset/Confirm command is 0FFH. Specifically A others are don’t care (512K × 8, 256K × 16) Flash Memory FIRST BUS CYCLE OPER. ADDRESS DATA Write X FFH ...

Page 9

... Flash Memory Compatible Status Register WSMS ESS CSR.7 = WRITE STATE MACHINE STATUS (WSMS Ready 0 = Busy CSR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = Erase in Progress/Completed CSR.5 = ERASE STATUS (ES Error in Block Erasure 0 = Successful Block Erase CSR.4 = DATA-WRITE STATUS (DWS Error in Data Write 0 = Data Write Successful CSR ...

Page 10

... DATA WRITE CSR. SUCCESSFUL LOW PP CSR.3 = DETECT 0 CLEAR CSRD RETRY/ERROR RECOVERY Figure 6. Word/Byte Writes with Compatible Status Register 10 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Write Word/Byte D = 40H or 10H Write Write Read Q = CSRD Toggle update CSRD Standby Check CSR ...

Page 11

... Flash Memory START WRITE 20H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER NO 0 SUSPEND CSR.7 = ERASE 1 CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE CSR FULL STATUS CHECK PROCEDURE READ CSRD (see above) 0 ERASE CSR. SUCCESSFUL ...

Page 12

... READ ARRAY DATA DONE NO READING? YES WRITE D0H WRITE FFH ERASE RESUMED READ ARRAY DATA Figure 8. Erase Suspend to Read Array with Compatible Status Register 12 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Write Erase D = B0H Suspend Read Q = CSRD Toggle update CSRD ...

Page 13

... Flash Memory START READ COMPATIBLE STATUS REGISTER 0 CSR RESET WP READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 77H WRITE D0H AND BLOCK ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. LOCK YES ANOTHER BLOCK? NO SET WP OPERATION COMPLETE BUS COMMAND ...

Page 14

... Use Set-Write-Protect flowchart. This step re-implements protection to locked blocks. 4. Use Word/Byte-Write or 2-Byte-Write flowchart sequences to write data. 5. Use Block-Lock flowchart to write lock bit if desired. Figure 10. Updating Data in a Locked Block 14 4M (512K × 8, 256K × 16) Flash Memory START RESET WP (NOTE 1) WRITE MORE ...

Page 15

... Flash Memory START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE FBH WRITE DATA/A -1 WRITE DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. ANOTHER YES 2-BYTE WRITE NO OPERATION COMPLETE Figure 11. Two-Byte Serial Writes with Compatible Status Registers (LH28F400SU) (Apply to LH28F400SU, x16/x8, 48TSOP/56TSOP/44SOP) ...

Page 16

... Single Block Erase to erase all of the unlocked blocks in sequence. 3. Set WP command is issued, if necessary. If CSR.3 (VPPS) is set to '0', after clearing CSR.3/4/5, 1. Retry Erase All Unlocked Block Erase command. 4M (512K × 8, 256K × 16) Flash Memory COMMAND COMMENTS Erase All D = A7H ...

Page 17

... Flash Memory START READ COMPATIBLE STATUS REGISTER 0 CSR WRITE 57H WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. OPERATION COMPLETE BUS COMMAND OPERATION Read Write Set Write Protect Set Confirm Write Read Read NOTE: If CSR. set command sequence error, should be cleared before further attempts are initiated ...

Page 18

... WRITE 47H WRITE CONFIRM DATA/ADDRESS READ COMPATIBLE STATUS REGISTER 0 CSR (NOTE) 1 CSR. OPERATION COMPLETE 18 4M (512K × 8, 256K × 16) Flash Memory BUS COMMAND OPERATION Read Write Reset Write Protect Write Reset Confirm Read Read NOTE: If CSR. set command sequence error, should be cleared before further attempts are initiated. ...

Page 19

... Flash Memory ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings* Temperature under bias ......................... 0°C to +80°C Storage temperature ......................... -65°C to +125° 5.0 V ± 0.5 V Systems CC SYMBOL PARAMETER T Operating Temperature, Commercial with Respect to GND Supply Voltage with Respect to GND PP PP Voltage on any Pin (Except V ...

Page 20

... Figure 17. Transient Equivalent Testing Load Circuit (V 1.5 OUTPUT FROM OUTPUT UNDER TEST 28F400SUT-NC60-14 Figure 18. Transient Equivalent Testing Load Circuit (V 4M (512K × 8, 256K × 16) Flash Memory 2 TRANSMISSION LINE TOTAL CAPACITANCE = 100 pF 28F400SUT-NC60-15 = 5.0 V ±0 2 TRANSMISSION LINE TOTAL CAPACITANCE = 30 pF 28F400SUT-NC60-16 = 5.0 V ± ...

Page 21

... Flash Memory DC Characteristics V = 5.0 V ± 0 0°C to +70° SYMBOL PARAMETER I Input Load Current IL I Output Leakage Current Standby Current CCS CC V Deep Power-Down CC I CCD Current Read Current CCR Read Current CCR Write Current CCW Block Erase Current ...

Page 22

... 0 0.0 5.5 V 5.0 4.5 5 25°C. These currents are valid for all less than Static operation. CCR (512K × 8, 256K × 16) Flash Memory TEST CONDITIONS NOTE V > Word/Byte PP PPH Write in Progress PPH Block Erase in Progress PPH Block Erase Suspended ...

Page 23

... Flash Memory AC Characteristics - Read Only Operations V = 5.0 V ± 0 0°C to +70° SYMBOL PARAMETER t Read Cycle Time AVAV t Address Setup to OE » Going Low AVGL t Address to Output Delay AVQV » Output Delay ELQV » High to Output Delay PHQV » ...

Page 24

... STANDBY V IH ADDRESSES ( ( ( ( HIGH-Z OH DATA (D/ 5 GND ( (512K × 8, 256K × 16) Flash Memory DEVICE AND ADDRESS SELECTION OUTPUTS ENABLED ADDRESSES STABLE t AVAV t AVGL t GLQV t ELQV t GLQX t ELQX t AVQV t PHQV Figure 19. Read Timing Waveforms V CC DATA VALID STANDBY . . . POWER-DOWN . . . . . . t EHQZ . . . t GHQZ . . . ...

Page 25

... Flash Memory V IH ADDRESSES ( ( ( BYTE ( HIGH-Z OH DATA ( HIGH-Z OH DATA ( ADDRESSES STABLE t AVAV t FLEL t AVGL t AVQV t GLQV t ELQV t GLQX t ELQX DATA OUTPUT t AVQV t FLQZ DATA OUTPUT Figure 20. BY     »   » Timing Waveforms LH28F400SU- EHQZ . . . ...

Page 26

... The power supply may start to switch concurrently with RP recommended operating voltage.     » 2. The address access time and RP high to data valid time are shown for 5 Characteristics Read Only Operations also (512K × 8, 256K × 16) Flash Memory 4 PL5V     » Power-Up and RP Reset Waveforms CC MIN ...

Page 27

... Flash Memory AC Characteristics for WE     » - Controlled Command Write Operations V = 5.0 V ± 0 0°C to +70° SYMBO- PARAMETER L t Write Cycle Time AVAV t V Set Going High VPWH PP » » Setup to CE Going Low PHEL » ...

Page 28

... ADDRESS AND DATA AUTOMATED DATA-WRITE (DATA-WRITE ERASE ERASE CONFIRM COMMAND DELAY AVWH t WHAX (NOTE AVWH WHAX t t WHWL WHQV WHDX t DVWH WHRL t VPWH 4M (512K × 8, 256K × 16) Flash Memory READ COMPATIBLE STATUS REGISTER DATA t WHGL t GHWL OUT IN t RHPL (NOTE 4) t QVVL 28F400SUT-NC60-20 ...

Page 29

... Flash Memory AC Characteristics for CE     » - Controlled Command Write Operations V = 5.0 V ± 0 0°C to +70° SYMBOL PARAMETER t Write Cycle Time AVAV » Setup to WE Going Low PHWL » Set Going High VPEH PP » Setup to CE ...

Page 30

... ADDRESS AND DATA AUTOMATED (DATA-WRITE) OR DATA-WRITE ERASE CONFIRM OR ERASE COMMAND DELAY AVEH t EHAX (NOTE AVEH EHAX t t EHEL EHQV EHDX t DVEH EHRL t VPEH 4M (512K × 8, 256K × 16) Flash Memory READ COMPATIBLE STATUS REGISTER DATA t EHGL t GHEL OUT IN t RHPL (NOTE 4) t QVVL 28F400SUT-NC60-21 ...

Page 31

... Flash Memory Erase and Byte Write Performance V = 5.0 V ± 0 0°C to +70° SYMBOL PARAMETER 1 t Byte Write Time WHRH 2 Two-Byte Serial Write Time t WHRH 3 t Word Write Time WHRH 4 t 16KB Block Write Time WHRH 5 t 16KB Block Write Time ...

Page 32

... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 32 4M (512K × 8, 256K × 16) Flash Memory 56 0.50 [0.020] TYP. 0.28 [0.011] 0.12 [0.005] 29 0.13 [0.005] 0.49 [0.019] 0.39 [0.015] ...

Page 33

... Flash Memory 48TSOP (TSOP048-P-1218) 0.50 [0.020] 0.30 [0.012] TYP. 0.10 [0.004 12.20 [0.480] 11.80 [0.465] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 25 16.60 [0.654] 18.40 [0.724] 16.20 [0.638] 17.60 [0.693] 24 0.15 [0.006] 1.10 [0.043] 0.425 [0.017] 0.90 [0.035] 1 ...

Page 34

... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH28F400SU X -NC## Device Type Package Speed Example: LH28F400SUT-NC60 (4M (512K x 8, 256K x 16) Flash Memory, 60 ns, 56-pin TSOP (512K × 8, 256K × 16) Flash Memory 23 13.40 [0.528] 16.40 [0.646] 13.00 [0.512] 15.60 [0.614] SEE 22 DETAIL 0 ...

Page 35

... Telex: 49608472 (SHARPCAM) Facsimile: (360) 834-8903 http://www.sharpmeg.com ©1997 by SHARP Corporation Issued July 1996 4M (512K × 8, 256K × 16) Flash Memory EUROPE SHARP Electronics (Europe) GmbH Microelectronics Division Sonninstraße 3 20097 Hamburg, Germany Phone: (49) 40 2376-2286 Telex: 2161867 (HEEG D) Facsimile: (49) 40 2376-2232 ...

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