AM29LV017D-70WCI Spansion Inc., AM29LV017D-70WCI Datasheet - Page 16

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AM29LV017D-70WCI

Manufacturer Part Number
AM29LV017D-70WCI
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV017D-70WCI

Cell Type
NOR
Density
16Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
21b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
FBGA
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
2M
Supply Current
16mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
18
Notes:
1. All protected sectors unprotected.
2. All previously protected sectors are protected once
Figure 2. Temporary Sector Unprotect Operation
again.
Unprotect Completed
Program Operations
Temporary Sector
Perform Erase or
RESET# = V
RESET# = V
(Note 1)
(Note 2)
START
ID
IH
Am29LV017D
against inadvertent writes (refer to Table 8 for com-
mand definitions). In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
power-down transitions, or from system noise.
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until V
is greater than V
proper signals to the control pins to prevent uninten-
tional writes when V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE#
= V
cle, CE# and WE# must be a logical zero while OE#
is a logical one.
Power-Up Write Inhibit
If WE# = CE# = V
up, the device does not accept commands on the
rising edge of WE#. The internal state machine is
a u t o m a ti c a l l y r e s e t to r e a d i n g a r ray d at a o n
power-up.
IL
, CE# = V
CC
CC
Write Inhibit
is less than V
IH
or WE# = V
LKO
IL
CC
. The system must provide the
and OE# = V
is greater than V
LKO
, the device does not ac-
IH
. To initiate a write cy-
IH
CC
LKO
during power
power-up and
.
CC
CC

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