CY7C346-35JC Cypress Semiconductor Corp, CY7C346-35JC Datasheet
CY7C346-35JC
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CY7C346-35JC Summary of contents
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... CY7C343(B) CY7C342B 128 44H,J • 3901 North First Street CY7C340 EPLD Family Enterprise™ design software. CY7C346(B) 128 128 128 128 256 256 68H,J,R 84H,J 100R,N • San Jose • CA 95134 Warp provides CY7C341B ...
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DEDICATED INPUTS LOGIC BLOCK ARRAY (LAB) EXPANDER PRODUCT TERMS MACROCELLS PROGRAMMABLE INTERCONNECT ARRAY (PIA) Figure 1. Key MAX Features 2 CY7C340 EPLD Family MULTIPLE ARRAYS (LABS) DUAL I/O FEEDBACK C340–1 ...
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Functional Description The Logic Array Block The logic array block, shown in Figure 2, is the heart of the MAX architecture. It consists of a macrocell array, expander product term array, and an I/O block. The number of mac- rocells, ...
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PROGRAMMABLE MACROCELL INTERCONNECT FEEDBACKS SIGNALS (32 FOR 7C344 EXPANDER DEDICATED PRODUCT INPUTS TERMS (64 FOR 7C344) MACROCELL P-TERMS EXPANDER P-TERMS Figure 5. Expander Product Terms I/O OUTPUT ENABLE PRESET ARRAY CLOCK CLEAR MACROCELL FEEDBACK NOTE: ONE SYSTEM ...
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I/O Block Separate from the macrocell array is the I/O control block of the LAB. Figure 6 shows the I/O block diagram. The three-state buffer is controlled by a macrocell product term and the drives the I/O pad. The input ...
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... Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...