TDA4857PS NXP Semiconductors, TDA4857PS Datasheet
TDA4857PS
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TDA4857PS Summary of contents
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... DATA SHEET TDA4857PS 2 I C-bus autosync deflection controller for PC monitors Product specification Supersedes data of 2000 Jan 31 File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 2001 Apr 11 ...
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... C-bus controllable output for vertical parabola Vertical parabola is independent of frequency and tracks with vertical adjustments. GENERAL DESCRIPTION The TDA4857PS is a high performance and efficient solution for autosync monitors. All functions are controllable by the I The TDA4857PS provides synchronization processing, horizontal and vertical synchronization with full autosync capability and very short settling times after mode changes ...
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... HPARAL horizontal parallelogram HPINBAL EW pin unbalance T ambient temperature amb ORDERING INFORMATION TYPE NUMBER NAME TDA4857PS SDIP32 2001 Apr 11 PARAMETER PACKAGE DESCRIPTION plastic shrink dual in-line package; 32 leads (400 mil) 3 Product specification TDA4857PS MIN. TYP. MAX. UNIT 9 100 % 16 ...
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... HORIZONTAL SIZE HORIZONTAL PINCUSHION AND AGC AND HORIZONTAL CORNER VERTICAL SIZE HORIZONTAL TRAPEZIUM HORIZONTAL SIZE VERTICAL POSITION VERTICAL SIZE, VOVSCN PROTECTION AND SOFT START TDA4857PS 2 I C-BUS REGISTERS X-RAY FREQUENCY DETECTOR PROTECTION PLL2, PARALLELOGRAM, HORIZONTAL PIN UNBALANCE AND OSCILLATOR SOFT START ...
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... HREF 28 reference current for horizontal oscillator HCAP 29 external capacitor for horizontal oscillator HPLL2 30 external filter for PLL2/soft start HSMOD 31 input for EHT compensation (via horizontal size) FOCUS 32 output for vertical focus 2001 Apr 11 DESCRIPTION 5 Product specification TDA4857PS ...
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... X-ray protection is activated Supply voltage at V Horizontal unlock blanking can be switched off, by control bit BLKDIS, via the I protection blanking is maintained. 6 Product specification TDA4857PS 2 C-bus. The width of the video clamping pulse is (pin 10) is low (see Fig.24 C-bus while vertical blanking and 2 C-bus ...
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... Thus the typical frequency range of the oscillator in this example is: f max f min 2 C-bus, The TV mode is centred around f 10%. Activation of the TV mode is only allowed between 15.625 and 35 kHz. 7 TDA4857PS and f min max and f . The oscillator is driven sync(min) sync(max) and R . HREF HBUF spread of ...
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... HDRV (pin 8) output pulse. For the TDA4857PS external modulation of the PLL2 HREF phase is not allowed, because this would disturb the start also takes HBUF advance of the horizontal focus parabola. ...
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... VSMOD (pin 21) can be used for a DC controlled EHT compensation of vertical size by correcting the differential must not VREF output currents at VOUT1 and VOUT2. The EW waveforms, vertical focus, pin unbalance and parallelogram corrections are not affected by VSMOD. 9 Product specification TDA4857PS should be used to select the free-running VCAP ---------------------------------------------------------- - fr V 10.8 R ...
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... HSIZE f(HSIZE – ---------------- - 14 HSIZE g(HSIZE, HSMOD – ------------------------------------------------------------------------- - I HREF ------------------------------- - HREF I HREF f = 70kHz 10 Product specification TDA4857PS , the pincushion, corner and V HSIZE + V 1 – ---------------- - HEHT 14.4 V 14.4 in the EWDRV output caused by I will be HSMOD as shown in the previous f(HSIZE HEHT HPIN h(I ) HREF V HSIZE V ...
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... The amplitude can be adjusted via register VFOCUS. FOCUS (pin 32) is designed as a voltage output for the vertical parabola. B+ control function block The B+ control function block of the TDA4857PS consists of an Operational Transconductance Amplifier (OTA), a voltage comparator, a flip-flop and a discharge circuit. This configuration allows easy applications for different B+ control concepts. See also Application Note AN96052: “ ...
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... B+ control drive pulse by the relationship of charge current to discharge current. Supply voltage stabilizer, references, start-up procedures and protection functions The TDA4857PS incorporates an internal supply voltage stabilizer to provide excellent stabilization for all internal references. An internal gap reference, especially designed for low-noise, is the reference for the internal horizontal and vertical supply voltages ...
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... V emission test EMC immunity test Note 1. Tests are performed with application reference board. Tests with other boards will have different results. 2001 Apr 11 PARAMETER PARAMETER PARAMETER 13 Product specification TDA4857PS CONDITIONS MIN. MAX. 0.5 +16 0.5 +6.0 0.5 +6.5 0.5 +8.0 0.5 +8 ...
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... 0.52 mA HREF f = 31.45 kHz 1.052 mA HREF kHz 2.141 mA HREF f = 100 kHz 3.345 mA HREF 0 V < V VSYNC 14 Product specification TDA4857PS MIN. TYP. 1.7 1 VIDEO NEGATIVE SYNC POLARITY 300 90 120 1.1 1.28 1.7 2.4 0 3.9 5 ...
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... CLAMP = 1; measured CLBL notes 1 and 2 1.7 control bit VBLK = 0 220 control bit VBLK = 1 305 0.59 CLBL 2 30.53 HBUF HREF nF; note 3 HCAP 15 Product specification TDA4857PS TYP. MAX. UNIT 400 s 1.8 ms 0.7 0.8 s 4.75 5. mV/K 50 ns/V 130 ns 1.0 s 300 ns 0.15 s 1.9 2 ...
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... HPOS = 0 register HPOS = 127 register HPOS = 255 register HPINBAL = 0; control bit HPC = 0; note 6 register HPINBAL = 15; control bit HPC = 0; note 6 register HPINBAL = X; control bit HPC = 1; note 6 16 Product specification TDA4857PS TYP. MAX. UNIT 6 0 +100 10 /K 130 kHz 2.55 2 ...
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... H V register HMOIRE = 31; control bit MOD = 0 control bit MOD = 1 maximum advance; register HPINBAL = 07; register HPARAL = 07 minimum advance; register HPINBAL = 07; register HPARAL = 07 V < 3.7 V HPLL2 HFLB HFLB HDRV HDRV HDRV 17 Product specification TDA4857PS MIN. TYP. MAX. UNIT 0 mV/% 4 5.5 V ...
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... XSEL pin 9 connected XSEL no reset via VREF C = 100 nF VCAP constant amplitude; note 7 50 control bit VBLK = 0 control bit VBLK = 1 control bit AGCDIS = 0 control bit AGCDIS = 1 18 Product specification TDA4857PS MIN. TYP 45.5 48 6.22 6.39 500 set control bit SOFTST via 2 ...
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... VSC = 0; note 8 register VLIN = X; control bit VSC = 1; note 8 ; see Fig.7 register VLINBAL = 0; control bit VLC = 0; note 8 register VLINBAL = 15; control bit VLC = 0; note 8 register VLINBAL = X; control bit VLC = 1; note 8 19 Product specification TDA4857PS MIN. TYP. MAX. ; see Fig.4 60 100 70 115.9 116.8 117.7 0 ...
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... VSC = 1; note 8 register HTRAP = 15; control bit VPC = 0; note 8 register HTRAP = 0; control bit VPC = 0; note 8 register HTRAP = X; control bit VPC = 1; note 8 register HSIZE = 255; note 8 register HSIZE = 0; note 8 20 Product specification TDA4857PS MIN. TYP. MAX 0.76 0.85 0.94 VOUT2 0 ...
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... HPC = 0; note 8 register HPARAL = X; control bit HPC = 1; note 8 register HPINBAL = 0; control bit HBC = 0; note 8 register HPINBAL = 15; control bit HBC = 0; note 8 register HPINBAL = X; control bit HBC = 1; note 8 V 1.9 V ASCOR 21 Product specification TDA4857PS TYP. MAX. UNIT 0. 120 A 500 5.0 ...
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... BDRV PIN BDRV I < BDRV measured HDRV BDRV BSENS capacitive load 0.5 mA BSENS V > 2.5 V BSENS fault condition 22 Product specification TDA4857PS MIN. TYP. 50 0.02 0.8 5.7 6 6.3 4.9 5.2 5.7 1 5.25 2.37 2.5 2.58 0.5 5.0 5.3 5.6 500 30 50 ...
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... PLL2 3.5 V < V < kHz V decreasing from decreasing from increasing from below CC typical decreasing from CC above typical 8.3 V VOLTAGE 23 Product specification TDA4857PS MIN. TYP. MAX < 8.6 9.0 3.5 4.0 7.9 8.3 8.7 7.7 8.1 8.5 4.7 3.4 2 ...
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... First pole of transconductance amplifier is 5 MHz without external capacitor (will become the second pole, if the OTA operates as an integrator). V BOP 12. Open-loop gain with no resistive load and C ------------- - V BIN 2001 Apr 11 ]’. fr(V) HREF = 10 nF [from BOP (pin 3) to GND]. BOP 24 Product specification TDA4857PS . The EWDRV low level of 1.2 V remains ...
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... I VOUT1 I VOUT2 ( (1) VPOS handbook, halfpage MBG594 ( (1) VLINBAL 25 Product specification TDA4857PS I is the maximum amplitude setting at register VSIZE = 127 1 and control bit VPC = 1. I – 100% = --------------------- - Fig.5 Adjustment of vertical position. I VOUT1 I VOUT2 I is the maximum amplitude setting at register VSIZE = 127, ...
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... V EWDRV Fig.10 Influence of trapezium at pin EWDRV. 2001 Apr 11 handbook, halfpage MGM069 V EWDRV V HPIN(EWDRV) t Fig.9 Influence of corner correction at pin EWDRV. handbook, halfpage MGM071 V EWDRV V HTRAP(EWDRV) t Fig.11 Influence of HSIZE and EHT compensation 26 Product specification TDA4857PS V HCOR(EWDRV) V HSIZE(EWDRV) V HEHT(EWDRV) at pin EWDRV. MGM070 t MGM072 t ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors handbook, halfpage V ASCOR V c(ASCOR) Fig.12 Adjustment of parallelogram at pin ASCOR. 2001 Apr 11 handbook, halfpage MGM073 V ASCOR V c(ASCOR) V HPARAL(ASCOR) t Fig.13 Adjustment of pin balance at pin ASCOR. 27 Product specification TDA4857PS MGM074 V HPINBAL(ASCOR) t ...
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... VOUT1 (pin 13) and VOUT2 (pin 12) EW drive waveform at EWDRV (pin 11) 2001 Apr 11 4.0 V automatic trigger level 3.8 V synchronized trigger level 1.4 V inhibited I VOUT1 I VOUT2 DC shift 3.6 V maximum Fig.14 Pulse diagram for vertical part. 28 Product specification TDA4857PS 7.0 V maximum low-level 1.2 V fixed MGM075 ...
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... HFLB (pin 1) PLL2 control current at HPLL2 (pin 30) line drive pulse at HDRV (pin 8) 2001 Apr PLL2 control range 45 to 52% of line period Fig.15 Pulse diagram for horizontal part. 29 Product specification TDA4857PS - vertical blanking level – MHB660 ...
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... CLBL (pin 16) b. Generation of video clamping pulses during vertical sync with serration pulses. Fig.17 Pulse diagrams for composite sync applications. 2001 Apr 110 time of HDRV as a function of horizontal frequency. OFF 30 Product specification TDA4857PS MGM077 130 f H (kHz) MGC947 MBG596 ...
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... C-bus message until the start of the vertical sync or vertical blanking. vertical handbook, full pagewidth sync pulse vertical blanking pulse SDA Fig.18 Timing of the I 2001 Apr 11 (2) (3) A SUBADDRESS 2 C-bus transmission for interference-free adjustment. 31 Product specification TDA4857PS (4) (3) (5) A DATA parameter change takes effect (3) ( MGM088 ...
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... HPLL2) Notes don’t care this bit is occupied by another function. If the register is addressed, the bit values for both functions must be transferred. 3. Bits STDBY and SOFTST can be reset by internal protection circuit. 2001 Apr 11 FUNCTION 32 Product specification TDA4857PS REGISTER ASSIGNMENT SAD (HEX ...
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Acrobat reader. white to force landscape pages to be ... 2 Table 5 List of I C-bus controlled functions and those accessible by pins; ...
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... Pin HUNLOCK is at LOW-level when PLL1 is locked Any change of the register content will result in immediate change of the output behaviour Setting control bit SOFTST = 0 is the only way (except power-down via pin leave the operating mode. CC See L4 of Fig.20 for starting the soft-down sequence. Product specification TDA4857PS ...
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... Set control bit STDBY = 1 Driver outputs are floating (same as protection mode) Supply current Only the I C-bus and protection circuits are operative Contents of all registers except the value of bit STDBY and bit SOFTST are lost See L2 of Fig.19 for continuation. Product specification TDA4857PS ...
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... This function is independent from the operating mode works under any condition. All driver outputs are immediately disabled IC enters standby mode. 2001 Apr 8.1 V (1) L1 MGM079 2 Fig.21 I C-bus flow for any mode. shut-down: 36 Product specification TDA4857PS soft-down sequency followed by a soft start sequence is generated 8.6 V internally. 8 enters standby mode. 8.6 V 8.1 V ...
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... V HDRV V HPLL2 SOFT START OTA 2 BIN V BOP 4 V BSENS BOP Feedback mode application. Fig.22 Application and timing for feedback mode. 37 Product specification TDA4857PS ( BDRV S Q TR1 R Q INVERTING BUFFER DISCHARGE R5 t off(min) V RESTART(BSENS) V STOP(BSENS) MBG600 c. Waveforms for fault condition. ...
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... V BOP Fig.23 Application and timing for feed forward mode ( INVERTING HORIZONTAL BUFFER OUTPUT Q STAGE Q EHT transformer 3 V BDRV TR1 R3 t off (discharge time of C BSENS ) c. Waveforms for fault condition. Product specification TDA4857PS horizontal flyback pulse MOSFET MGM081 V RESTART(BSENS) V STOP(BSENS) MBG602 ...
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... Start-up sequence. 8.6 V continuous blanking (pin 16 and 17) activated PLL2 soft-down sequence is triggered 8 data accepted from I video clamping pulse disabled 3 Shut-down sequence. Fig.24 Start-up sequence and shut-down sequence. 39 TDA4857PS MGM082 continuous blanking off (1) PLL2 soft start/soft-down enabled 2 C-bus time MGM083 (2) 2 C-bus ...
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... HDRV/HFLB protection disabled 3.4 V BDRV duty cycle begins to decrease 2.8 V BDRV floating HDRV duty cycle begins to decrease 1 < 8 Product specification TDA4857PS MGM084 continuous blanking off PLL2 enabled frequency detector enabled HDRV/HFLB protection enabled time > 8 MGM085 (1) (1) HDRV floating VOUT1 and VOUT2 floating ...
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... HDRV/HFLB protection disabled 3.3 V BDRV duty cycle begins to decrease 3.0 V BDRV floating HDRV duty cycle begins to decrease 1.7 V HDRV floating < 8 Product specification TDA4857PS MHB108 continuous blanking off PLL2 enabled frequency detector enabled HDRV/HFLB protection enabled time > 8 MHB109 (1) (1) time > ...
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... V. 1 VOUT VCAP ( 2 VOUT VCAP ( 3 VOUT VCAP I – Which means -------------- – Vertical linearity error = 1 max – -------------- 2001 Apr 11 X-ray latch triggered (1) I VOUT ( A) 415 ( 415 I – -------------- I 0 Fig.28 Definition of vertical linearity error. 42 TDA4857PS floating floating MHB657 MBG551 (3) ( VCAP Product specification ...
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... TDA4857PS 100 only this path may be connected to general ground of PCB Fig.29 Hints for printed-circuit board (PCB) layout. 43 Product specification TDA4857PS external components of vertical section pin 25 should be the 'star point' for all small signal components no external ground tracks connected here MHB659 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors INTERNAL PIN CONFIGURATION PIN SYMBOL 1 HFLB 2 XRAY 3 BOP 4 BSENS 2001 Apr 11 INTERNAL CIRCUIT 1 MBG562 Product specification TDA4857PS MBG561 6.25 V 5.3 V MBG563 MBG564 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 5 BIN 6 BDRV 7 PGND power ground, connected to substrate 8 HDRV 9 XSEL EWDRV 2001 Apr 11 INTERNAL CIRCUIT 5 MBG565 6 MBG566 8 MGM089 MBK381 10 MGM090 108 11 108 MBG570 45 Product specification TDA4857PS ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 12 VOUT2 13 VOUT1 14 VSYNC 15 HSYNC 16 CLBL 2001 Apr 11 INTERNAL CIRCUIT MBG571 12 MBG572 13 100 1 7 MBG575 46 Product specification TDA4857PS MBG573 1.4 V MBG574 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 17 HUNLOCK 18 SCL 19 SDA 20 ASCOR 21 VSMOD 2001 Apr 11 INTERNAL CIRCUIT 17 MGM091 18 MGM092 19 MGM093 480 20 MGM094 250 MGM095 47 Product specification TDA4857PS ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 22 VAGC 23 VREF 24 VCAP 25 SGND signal ground 26 HPLL1 27 HBUF 2001 Apr 11 INTERNAL CIRCUIT MBG582 24 MBG583 26 4 MGM097 48 Product specification TDA4857PS MBG581 MGM096 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 28 HREF 29 HCAP 30 HPLL2 31 HSMOD 2001 Apr 11 INTERNAL CIRCUIT HFLB 250 31 49 Product specification TDA4857PS 2.525 V MBG585 6.25 V MGM098 5 V MGM099 ...
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... C-bus autosync deflection controller for PC monitors PIN SYMBOL 32 FOCUS Electrostatic discharge (ESD) protection pin Fig.30 ESD protection for pins 13, 16 and 17. 2001 Apr 11 INTERNAL CIRCUIT MBG559 Fig.31 ESD protection for pins Product specification TDA4857PS 120 32 200 120 MGM100 pin 7.3 V 7.3 V and 26 to 32. MBG560 ...
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... Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT232-1 2001 Apr scale (1) ( 1.3 0.53 0.32 29.4 9.1 0.8 0.40 0.23 28.5 8.7 REFERENCES JEDEC EIAJ 51 Product specification TDA4857PS 3.2 10.7 12.2 1.778 10.16 2.8 10.2 10.5 EUROPEAN PROJECTION SOT232-1 M ...
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... This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. 52 Product specification TDA4857PS stg(max) WAVE (1) suitable DEFINITIONS ). If the ...
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... C components conveys a license under the Philips’ system provided the system conforms to the I 53 Product specification TDA4857PS These products are not Philips Semiconductors 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors 2001 Apr 11 NOTES 54 Product specification TDA4857PS ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors 2001 Apr 11 NOTES 55 Product specification TDA4857PS ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...