IDT74ALVCH16373PA IDT, Integrated Device Technology Inc, IDT74ALVCH16373PA Datasheet

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IDT74ALVCH16373PA

Manufacturer Part Number
IDT74ALVCH16373PA
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
D-Typer
Datasheet

Specifications of IDT74ALVCH16373PA

Logic Family
ALVC
Number Of Bits
16
Number Of Elements
2
Latch Mode
Transparent
Polarity
Non-Inverting
Technology
CMOS
Output Type
3-State
Package Type
TSSOP
Propagation Delay Time
6ns
Operating Supply Voltage (typ)
3.3V
High Level Output Current
-24mA
Low Level Output Current
24mA
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT74ALVCH16373PA
Manufacturer:
IDT
Quantity:
10
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical t
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
• V
• V
• V
• CMOS power levels (0.4μ μ μ μ μ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in TSSOP package
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for heavy loads
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2004 Integrated Device Technology, Inc.
1
IDT74ALVCH16373
3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
1
1
OE
LE
machine model (C = 200pF, R = 0)
D
CC
CC
CC
1
= 3.3V ± 0.3V, Normal Range
= 2.5V ± 0.2V
= 2.7V to 3.6V, Extended Range
48
47
1
SK(o)
(Output Skew) < 250ps
TO 7 OTHER CHANNELS
1D
C1
3.3V CMOS 16-BIT
TRANSPARENT D-TYPE
LATCH WITH 3-STATE
OUTPUTS AND BUS-HOLD
2
1
Q
1
1
2
DESCRIPTION:
technology. The ALVCH16373 is particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and working registers. This device
can be used as two 8-bit latches or one 16-bit latch. When the latch enable (LE)
input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the
Q outputs are latched at the levels set up at the D inputs.
a normal logic state (high or low logic levels) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus lines signifi-
cantly. The high-impedance state and the increased drive provide the capability
to drive bus lines without need for interface or pullup components. OE does not
affect internal operations of the latch. Old data can be retained or new data can
be enetered while the outputs are in the high-impedance state.
driver is capable of driving a moderate to heavy load while maintaining speed
performance.
whenever the input goes to a high impedance. This prevents floating inputs and
eliminates the need for pull-up/down resistor.
2
OE
2
LE
D
This 16-bit transparent D-type latch is built using advanced dual metal CMOS
A buffered output-enable (OE) can be used to place the eight outputs in either
The ALVCH16373 has been designed with a ±24mA output driver. This
The ALVCH16373 has “bus-hold” which retains the inputs’ last state
1
25
36
24
TO 7 OTHER CHANNELS
INDUSTRIAL TEMPERATURE RANGE
1D
C1
IDT74ALVCH16373
JANUARY 2004
13
DSC-4574/4
2
Q
1

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IDT74ALVCH16373PA Summary of contents

Page 1

IDT74ALVCH16373 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES: • 0.5 MICRON CMOS Technology • Typical t (Output Skew) < 250ps SK(o) • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, ...

Page 2

IDT74ALVCH16373 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS PIN CONFIGURATION GND ...

Page 3

IDT74ALVCH16373 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition –40°C to +85°C A Symbol Parameter V Input HIGH Voltage Level IH V Input ...

Page 4

IDT74ALVCH16373 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS OUTPUT DRIVE CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL NOTE and V must be within the min. or max. range shown in ...

Page 5

IDT74ALVCH16373 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS (1) (1) Symbol V = 3.3V±0. 2. LOAD V 2.7 2 1.5 1 ...

Page 6

IDT74ALVCH16373 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS ORDERING INFORMATION X XX IDT XX ALVC Bus-Hold Family Temp. Range CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 XX XXX Device Type Package Thin Shrink Small ...

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