CY62256VLL-70ZI Cypress Semiconductor Corp, CY62256VLL-70ZI Datasheet - Page 6

• Manufacturer Part Number: CY62256VLL-70ZI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62256VLL-70ZI

• Density: 256Kb
• Access Time (max): 70ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 15b
• Package Type: TSOP-I
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 30mA
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Word Size: 8b
• Number Of Words: 32K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05057 Rev. *F
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)
Read Cycle No. 2 (OE Controlled)
Write Cycle No. 1 (WE Controlled)
Notes:
12. Device is continuously selected. OE, CE = V
13. WE is HIGH for read cycle.
14. Address valid prior to or coincident with CE transition LOW.
15. Data I/O is high impedance if OE = V
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
17. During this period, the I/Os are in output state and input signals should not be applied.
DATA OUT
DATA OUT
CURRENT
ADDRESS
ADDRESS
DATA I/O
SUPPLY
V
WE
CE
OE
CE
OE
CC
NOTE 17
PREVIOUS DATA VALID
HIGH IMPEDANCE
t
PU
IH
t
LZCE
t
.
SA
t
HZOE
[13, 14]
[10, 15, 16]
t
t
IL
ACE
LZOE
.
t
50%
OHA
t
DOE
t
AA
t
AW
[12, 13]
t
RC
t
WC
t
RC
DATA
t
t
PWE
SD
IN
VALID
DATA VALID
DATA VALID
t
HA
t
HD
t
t
HZOE
HZCE
t
PD
50%
CY62256V
IMPEDANCE
Page 6 of 12
HIGH
ICC
ISB
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