LFX125EB-03F256C Lattice, LFX125EB-03F256C Datasheet - Page 72

• Manufacturer Part Number: LFX125EB-03F256C
• Description: IC FPGA 139K GATES 256-BGA
• Manufacturer: Lattice

Specifications of LFX125EB-03F256C

• Lead Free Status / Rohs Status: Contains lead / RoHS non-compliant
• Other names: 220-1237

Lattice Semiconductor
ispXPGA Logic Signal Connections: 516-Ball fpBGA (Cont.)
BGA Ball
516-Ball
AA1
AA2
AA3
AB2
AC2
AB3
AA4
AC1
AD1
AE1
AC3
AC4
AD2
AD3
AE2
AD4
AF1
AF2
W1
W2
W3
R2
R3
R4
U1
U2
U3
V1
V2
V3
V4
Y1
Y2
Y4
Y3
T4
T3
T2
T1
-
-
-
-
-
-
-
-
-
-
-
Signal Name
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
BK1_IO10
BK1_IO11
BK1_IO12
BK1_IO13
BK1_IO14
BK1_IO15
BK1_IO16
BK1_IO17
BK1_IO18
BK1_IO19
BK1_IO20
BK1_IO21
BK1_IO22
BK1_IO23
BK1_IO24
BK1_IO25
BK1_IO26
BK1_IO27
BK1_IO28
BK1_IO29
BK1_IO30
BK1_IO31
BK1_IO32
BK1_IO0
BK1_IO1
BK1_IO2
BK1_IO3
BK1_IO4
BK1_IO5
BK1_IO6
BK1_IO7
BK1_IO8
BK1_IO9
GNDP0
GCLK0
GCLK1
VCCP0
GCLK2
GCLK3
-
-
-
-
-
-
SS_CLKOUT0P
SS_CLKOUT0N
HSI2A_SOUTP
HSI2A_SOUTN
HSI2B_SOUTP
HSI2B_SOUTN
SS_CLKINOP
SS_CLKINON
HSI2A_SINN
HSI2B_SINN
HSI2A_SINP
HSI2B_SINP
CLK_OUT2
CLK_OUT3
PLL_FBK2
PLL_FBK3
PLL_RST2
PLL_RST3
Function
LFX500
Second
VREF1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LVDS Pair0P
LVDS Pair0N
LVDS Pair1P
LVDS Pair1N
LVDS Pair/
Reserved
33P/HSI2
33N/HSI2
34P/HSI2
34N/HSI2
35P/HSI2
35N/HSI2
36P/HSI2
36N/HSI2
37P/HSI2
sysHSI
21N
22N
23N
24N
25N
26N
27N
28N
29N
30N
31N
32N
21P
22P
23P
24P
25P
26P
27P
28P
29P
30P
31P
32P
-
-
-
-
-
-
-
-
-
-
-
-
-
1
Signal Name
GND (Bank 0)
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
BK1_IO10
BK1_IO11
BK1_IO12
BK1_IO13
BK1_IO14
BK1_IO15
BK1_IO16
BK1_IO17
BK1_IO18
BK1_IO19
BK1_IO20
BK1_IO21
BK1_IO22
BK1_IO23
BK1_IO0
BK1_IO1
BK1_IO2
BK1_IO3
BK1_IO4
BK1_IO5
BK1_IO6
BK1_IO7
BK1_IO8
BK1_IO9
GNDP0
GCLK0
GCLK1
VCCP0
GCLK2
GCLK3
NC
NC
NC
NC
NC
NC
NC
NC
NC
-
-
-
-
-
-
72
SS_CLKOUT0P
HSI1A_SOUTP
HSI1A_SOUTN
HSI1B_SOUTP
HSI1B_SOUTN
SS_CLKOUT0
SS_CLKIN0P
SS_CLKIN0N
HSI1A_SINN
HSI1B_SINN
HSI1A_SINP
HSI1B_SINP
CLK_OUT2
CLK_OUT3
PLL_FBK2
PLL_FBK3
PLL_RST2
PLL_RST3
Function
Second
LFX200
VREF1
N
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LVDS Pair0N
LVDS Pair1N
LVDS Pair0P
LVDS Pair1P
LVDS Pair/
Reserved
18P/HSI1
18N/HSI1
19P/HSI1
19N/HSI1
20P/HSI1
20N/HSI1
21P/HSI1
21N/HSI1
22P/HSI1
22N/HSI1
23P/HSI1
23N/HSI1
24P/HSI1
24N/HSI1
sysHSI
13P
13N
14P
14N
15P
15N
16P
16N
17P
17N
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1
ispXPGA Family Data Sheet
Signal Name
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
BK1_IO10
BK1_IO11
BK1_IO12
BK1_IO13
BK1_IO14
BK1_IO15
BK1_IO16
BK1_IO17
BK1_IO18
BK1_IO19
BK1_IO20
BK1_IO21
BK1_IO0
BK1_IO1
BK1_IO2
BK1_IO3
BK1_IO4
BK1_IO5
BK1_IO6
BK1_IO7
BK1_IO8
BK1_IO9
VCCP0
GNDP0
GCLK0
GCLK1
GCLK2
GCLK3
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
-
-
-
-
-
-
-
-
SS_CLKOUT0P
SS_CLKOUT0
SS_CLKIN0N
SS_CLKIN0P
CLK_OUT2
CLK_OUT3
PLL_RST2
PLL_RST3
PLL_FBK2
PLL_FBK3
Function
LFX125
Second
VREF1
N
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LVDS Pair0P
LVDS Pair0N
LVDS Pair1P
LVDS Pair1N
LVDS Pair/
Reserved
sysHSI
11P
11N
12P
12N
13P
13N
14P
14N
15P
15N
16P
16N
17P
17N
18P
18N
19P
19N
20P
20N
21P
21N
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1