PCA9541PW/01,112 NXP Semiconductors, PCA9541PW/01,112 Datasheet - Page 19

IC I2C 2:1 SELECTOR 16-TSSOP

PCA9541PW/01,112

Manufacturer Part Number
PCA9541PW/01,112
Description
IC I2C 2:1 SELECTOR 16-TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9541PW/01,112

Applications
2-Channel I²C Multiplexer
Interface
I²C, SMBus
Voltage - Supply
2.3 V ~ 5.5 V
Package / Case
16-TSSOP
Mounting Type
Surface Mount
For Use With
568-3615 - DEMO BOARD I2C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-1043-5
935273297112
PCA9541PW/01
NXP Semiconductors
9. Characteristics of the I
PCA9541_7
Product data sheet
9.1 Bit transfer
9.2 START and STOP conditions
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line, while the clock is HIGH is defined as the START condition (S).
A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the
STOP condition (P) (see
Fig 9.
Fig 10. Definition of START and STOP conditions
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
Bit transfer
START condition
2
SDA
SCL
C-bus
S
Rev. 07 — 2 July 2009
Figure
2-to-1 I
10).
2
C-bus master selector with interrupt logic and reset
data valid
data line
stable;
Figure
allowed
change
of data
9).
STOP condition
mba607
PCA9541
P
© NXP B.V. 2009. All rights reserved.
mba608
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