DS99R105SQ/NOPB National Semiconductor, DS99R105SQ/NOPB Datasheet - Page 5

IC SERIALIZER 40MHZ 24BIT 48LLP

DS99R105SQ/NOPB

Manufacturer Part Number
DS99R105SQ/NOPB
Description
IC SERIALIZER 40MHZ 24BIT 48LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of DS99R105SQ/NOPB

Function
Serializer
Data Rate
960Mbps
Input Type
LVTTL/LVCMOS
Output Type
LVDS
Number Of Inputs
24
Number Of Outputs
1
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
25°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DS99R105SQTR
t
t
t
t
t
t
t
t
t
t
t
t
RxIN_TOL_L Receiver INput TOLerance
RxIN_TOL_R Receiver INput TOLerance
ROS
ROH
ROS
ROH
ROS
ROH
HZR
LZR
ZHR
ZLR
DD
DRDL
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 3: Typical values represent most likely parametric norms at VDD = 3.3V, Ta = +25 degC, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 4: Current into device pins is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground except VOD, ΔVOD,
VTH and VTL which are differential voltages.
Note 5: When the Serializer output is tri-stated, the Deserializer will lose PLL lock. Resynchronization MUST occur before data transfer.
Note 6: RxIN_TOL is a measure of how much phase noise (jitter) the deserializer can tolerate in the incoming data stream before bit errors occur. It is a
measurement in reference with the ideal bit position, please see National’s AN-1217 for detail.
Note 7: The Deserializer PLL lock time (t
Note 8: Specification is guaranteed by characterization and is not tested in production.
Note 9: t
Note 10: UI – Unit Interval, equivalent to one ideal serialized data bit width. The UI scales with frequency.
Note 11: Figures 1, 2, 8, 12, 14 show a falling edge data strobe (TCLK IN/RCLK OUT).
Note 12: Figures 5, 15 show a rising edge data strobe (TCLK IN/RCLK OUT).
Note 13: TxOUT_E_O is affected by pre-emphasis value.
Symbol
JIT
(@BER of 10e-9) specifies the allowable jitter on TCLK. t
ROUT (7:0) Setup Data to
RCLK (Group 1)
ROUT (7:0) Hold Data to RCLK
(Group 1)
ROUT (15:8) Setup Data to
RCLK (Group 2)
ROUT (15:8) Hold Data to
RCLK (Group 2)
ROUT (23:16) Setup Data to
RCLK (Group 3)
ROUT (23:16) Hold Data to
RCLK (Group 3)
HIGH to TRI-STATE Delay
LOW to TRI-STATE Delay
TRI-STATE to HIGH Delay
TRI-STATE to LOW Delay
Deserializer Delay
Deserializer PLL Lock Time
from Powerdown
Left
Right
Parameter
DRDL
) may vary depending on input data patterns and the number of transitions within the pattern.
(Figure 15)
(Figure 15)
(Figure 15)
(Figure 13)
(Figure 12)
(Figure 14)
(Notes 7, 8)
(Figure 16)
(Notes 6, 8, 10)
(Figure 16)
(Notes 6, 8, 10)
Conditions
JIT
not included in TxOUT_E_O parameter.
5
ROUT [7:0]
ROUT [15:8],
LOCK
ROUT [23:16]
ROUT [23:0],
RCLK, LOCK
RCLK
3 MHz
40 MHz
3 MHz–40 MHz
3 MHz–40 MHz
Pin/Freq.
(0.40)*
(0.40)*
(0.40)*
(0.40)*
(0.40)*
(0.40)*
t
t
t
t
t
t
Min
RCP
RCP
RCP
RCP
RCP
RCP
(29/56)*t
(27/56)*t
(27/56)*t
(29/56)*t
[4+(3/56)]T
0.5*t
0.5*t
+5.9
Typ
3
3
3
3
5
5
RCP
RCP
RCP
RCP
RCP
RCP
[4+(3/56)]T
+18.5
Max
0.25
0.25
10
10
10
10
50
50
www.national.com
Units
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UI
UI

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