AD9816JS Analog Devices Inc, AD9816JS Datasheet

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AD9816JS

Manufacturer Part Number
AD9816JS
Description
IC CCD SIGNAL PROC 12BIT 44-MQFP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 12-Bitr
Datasheet

Specifications of AD9816JS

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Current - Supply
86mA
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Not Compliant

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a
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
12-Bit 6 MSPS A/D Converter
No Missing Codes Guaranteed
3-Channel or 1-Channel Operation
Correlated Double Sampling
8-Bit Programmable Gain
8-Bit Offset Adjustment
PGA Output Monitor
Input Clamp Circuitry
Internal Voltage Reference
3-Wire Serial Interface
+3.3 V/+5 V Digital Output Compatibility
44-Lead MQFP Package
Low Power CMOS: 420 mW Typ
OFFSET
VING
VINR
VINB
CDSCLK1
AVDD
CLAMP/CDS
CLAMP/CDS
CLAMP/CDS
AVSS
CDSCLK2
CAPT
100mV
DAC
DAC
DAC
+
+
+
FUNCTIONAL BLOCK DIAGRAM
ADCCLK
CAPB
REGISTERS
OFFSET
1X–6X
CML PGAOUT VREF
PGA
PGA
PGA
8
8
PRODUCT DESCRIPTION
The AD9816 is a complete analog signal processor for CCD
and CIS applications. Included is all the necessary circuitry to
perform three-channel conditioning and sampling for a variety
of imaging applications.
The signal chain consists of an input clamp, correlated double
sampler (CDS), offset adjust DAC, programmable gain ampli-
fier and a 12-bit A/D converter. The CDS and input clamp may
be disabled for CIS applications.
The internal registers are programmed using a 3-wire serial
interface and provide adjustment of the gain, offset and operat-
ing mode.
The AD9816 operates from a +5 V supply, typically consumes
420 mW of power and is packaged in a 44-lead MQFP.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
R
G
B
CONFIGURATION
REGISTER
REGISTER
R
G
B
MUX
MUX
REGISTERS
DVDD
GAIN
CCD/CIS Signal Processor
Complete 12-Bit 6 MSPS
DVSS DRVDD DRVSS
World Wide Web Site: http://www.analog.com
REFERENCE
AD9816
BANDGAP
12-BIT
ADC
CONTROL
DIGITAL
PORT
12
© Analog Devices, Inc., 1998
OEB
SLOAD
SCLK
SDATA
DOUT
11:0
AD9816

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AD9816JS Summary of contents

Page 1

FEATURES 12-Bit 6 MSPS A/D Converter No Missing Codes Guaranteed 3-Channel or 1-Channel Operation Correlated Double Sampling 8-Bit Programmable Gain 8-Bit Offset Adjustment PGA Output Monitor Input Clamp Circuitry Internal Voltage Reference 3-Wire Serial Interface +3.3 V/+5 V Digital ...

Page 2

AD9816–SPECIFICATIONS ANALOG SPECIFICATIONS MHz MHz, PGA Gain = 1, Input Range = 3 V p-p, Input Capacitor = 1200 pF, unless otherwise noted) CDSCLK1 CDSCLK2 Parameter MAXIMUM CONVERSION RATE 3-Channel Mode with CDS 1-Channel ...

Page 3

DIGITAL SPECIFICATIONS MHz MHz unless otherwise noted) CDSCLK1 CDSCLK2 L Parameter LOGIC INPUTS High Level Input Voltage Low Level Input Voltage High Level Input Current Low Level Input Current Input ...

Page 4

AD9816 PIXEL n ( ANALOG INPUTS CDSCLK1 t C1C2 CDSCLK2 t t ADCLK ADC2 ADCCLK t ADCLK OUTPUT DATA R(n–2) G(n–2) B(n–2) D11:D0 PGAOUT_T G(n–1) B(n–1) PGAOUT_C PIXEL n ( ...

Page 5

ANALOG INPUTS t C2 CDSCLK2 t ADC2 ADCCLK t ADCLK OUTPUT DATA PIXEL (n–4) D11:D0 PGAOUT_T PIXEL (n–1) PGAOUT_C OPTICAL BLACK OR DUMMY PIXELS ANALOG INPUTS CDSCLK1 CDSCLK2 ADCCLK Figure 5. Line Clamp Timing for 3-Channel CDS Mode ADCCLK OUTPUT ...

Page 6

... Temperature Model Range AD9816JS +70 C AD9816JS-80010 +70 C AD9816-EB CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9816 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges ...

Page 7

PIN FUNCTION DESCRIPTIONS Pin Pin Name Type Description 1 AVDD Analog Supply. 2 AVSS P Analog Ground CAPT AO Reference Decoupling CAPB AO Reference Decoupling. 7 VREF AO Internal Reference Output. 8 CML ...

Page 8

AD9816 DEFINITIONS OF SPECIFICATIONS INTEGRAL NONLINEARITY (INL) Integral nonlinearity error refers to the deviation of each indi- vidual code from a line drawn from “zero scale” through “posi- tive full scale.” The point used as “zero scale” occurs 1/2 LSB ...

Page 9

ADCCLK period minus 30 ns. The output data latency is three ADCCLK cycles. The offset and gain values for the red, green and blue channels are programmed using the serial interface. The order in which ...

Page 10

AD9816 Table II. 3-Channel Selection MUX Register Bits Table III. 1-Channel Selection MUX Register Bits The offset is variable from –100 mV ...

Page 11

CIRCUIT DESCRIPTIONS Analog Input Configuration for CDS and SHA Mode CDS Mode Operation Figure 13 shows the equivalent input circuit for the CDS mode of operation. The CCD signal is connected to the AD9816’s analog inputs through a coupling capacitor ...

Page 12

AD9816 Line Clamp If a line clamp technique is implemented (see Figure 5 for timing), the value of C should be increased to more than IN 1200 pF. The main requirement for line clamp is to keep the signal droop ...

Page 13

PGAOUT_T RED PGA 3:1 GREEN DIFF MUX PGA SELECT 2 BLUE MUX CONTROL PGA Figure 17. PGA/MUX Circuit Configuration PIXEL n BLUE ANALOG GREEN INPUTS RED CDSCLK2 ADCCLK RED(n) RESET PGAOUT_T GREEN(n–1) GREEN(n) PGAOUT_C BLUE(n–1) Figure 18. PGA Output Voltages ...

Page 14

AD9816 APPLICATIONS INFORMATION CDS Mode Circuit The recommended circuit configuration for CDS mode opera- tion is shown in Figure 20. The input coupling capacitor value of 1200 pF is recommended, but this value may be adjusted to suit a particular ...

Page 15

SHA Mode Circuit The circuit configuration for SHA mode is identical to CDS mode except for two differences: the analog inputs should be dc-coupled, and the OFFSET pin is tied to ground or a desired dc voltage (see Circuit Descriptions). ...

Page 16

AD9816 0.01 (0.25) MIN OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 44-Lead MQFP (S-44) 0.529 (13.45) 0.510 (12.95) 0.096 (2.45) 0.398 (10.1) MAX 0.390(9.90) 0.041 (1.03) 0.029 (0.73 SEATING PLANE TOP VIEW (PINS DOWN 0.009 ...

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