QT150-ASG Atmel, QT150-ASG Datasheet - Page 2

• Manufacturer Part Number: QT150-ASG
• Description: IC SENSOR 5KEY 5V 5MA SGL 28SSOP
• Manufacturer: Atmel
• Series: QProx™, QTouch™r
• Type: Capacitiver

Specifications of QT150-ASG

• Touch Panel Interface: 10, 2-Wire
• Number Of Inputs/keys: 5 Key
• Resolution (bits): 10, 14 b
• Voltage Reference: Internal
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 2.5mA
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Output Type: *
• Interface: *
• Input Type: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1 - OVERVIEW
QT140/150 devices are burst mode digital charge-transfer
(QT) sensor ICs designed specifically for touch controls; they
include all hardware and signal processing functions
necessary to provide stable sensing under a wide variety of
conditions. Only a single low cost capacitor per channel is
required for operation.
Figures 1-6 and 1-7 show basic circuits for these devices.
See Table 1-1 for device pin listings.
lQ
Table 1-1 Pin Listing
Pin
QT140 / QT150 SSOP-28
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SNS1A
SNS1B
SNS2A
SNS2B
SNS3A
SNS3B
SNS4A
SNS4B
1
2
3
4
5
6
7
8
9
Vdd
Vdd
Vss
Vss
Vss
NC
Name
Vss
Vss
Vdd
Vdd
SNS1A
SNS1B
SNS2A
SNS2B
SNS3A
SNS3B
SNS4A
SNS4B
NC/SNS5A
Vss
NC/SNS5B
OC
AKS
OUT1
OUT2
OUT3
OUT4
NC/OUT5
SYNC
OPT1
OPT2
OSC_O
OSC_I
/RST
NOTE: SSOP / DIP Pinouts are not the same!
SSOP
Fig 1-1 QT140 Pinouts
Negative power (Ground)
Negative power (Ground)
Positive power
Description
Positive power
Sense pin (to Cs1, electrode)
Sense pin (to Cs1)
Sense pin (to Cs2, electrode)
Sense pin (to Cs2)
Sense pin (to Cs3, electrode)
Sense pin (to Cs3)
Sense pin (to Cs4, electrode)
Sense pin (to Cs4)
Sense pin (to Cs5, electrode) n/c on QT140
Supply negative rail (ground)
Sense pin (to Cs5) n/c on QT140
Output Option (input pin; 1= open drain)
Adjacent Key Suppression Opt. (input; 1=AKS)
Channel 1 output, o-d or p-p
Channel 2 output, o-d or p-p
Channel 3 output, o-d or p-p
Channel 4 output, o-d or p-p
Channel 5 output, o-d or p-p (n/c on QT140)
Synchronization pin (I/O pin - pull high with 10K)
Option Mode (Input pin - see Table 2-1)
Option Mode (Input pin - see Table 2-1)
Oscillator output
Oscillator input
Reset pin (active low input)
/RST
OSC_I
OSC_O
OPT2
OPT1
SYNC
NC
OUT4
OUT3
OUT2
AKS
OC
OUT1
NC
SNS1A
SNS1B
SNS2A
SNS2B
SNS3A
SNS3B
SNS4A
SNS4B
Vdd
Vdd
Vss
Vss
Vss
NC
DIP
/RST
OSC_I
OSC_O
OPT2
OPT1
SYNC
NC
OUT4
OUT3
OUT2
OUT1
AKS
OC
NC
2
Pin
The DIP and SOIC pinouts are not the same and serious
damage can occur if a part is miswired.
1.1 BASIC OPERATION
The devices employ bursts of charge-transfer cycles to
acquire signals. Burst mode permits low power operation,
dramatically reduces RF emissions, lowers susceptibility to
RF fields, and yet permits excellent speed. Internally, signals
are digitally processed to reject impulse noise using a
'consensus' filter that requires three consecutive
confirmations of detection. Each channel is measured in
sequence starting with Channel 1.
The QT switches and charge measurement hardware
functions are all internal to the device. A single-slope
switched capacitor ADC includes the QT charge and transfer
switches in a configuration that provides direct ADC
conversion; an external Cs capacitor accumulates the charge
from sense-plate Cx, which is then measured.
Larger values of Cx cause the charge transferred into Cs to
rise more rapidly, reducing available resolution; as a
minimum resolution is required for proper operation, this can
result in dramatically reduced gain. Conversely, larger values
of Cs reduce the rise of differential voltage across it,
increasing available resolution by permitting longer QT
bursts. The value of Cs can thus be increased to allow larger
values of Cx to be tolerated. The IC is responsive to both Cx
and Cs, and changes in Cs can result in substantial changes
in sensor gain.
QT140 / QT150 DIP-28
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
Name
Vdd
Vdd
Vss
Vss
Vss
SNS1A
SNS1B
SNS2A
SNS2B
SNS3A
SNS3B
SNS4A
SNS4B
NC/SNS5A
NC/SNS5B
OC
AKS
OUT1
OUT2
OUT3
OUT4
NC/OUT5
SYNC
OPT1
OPT2
OSC_O
OSC_I
/RST
Description
Positive power
Positive power
Negative power (Ground)
Negative power (Ground)
Negative power (Ground)
Sense pin (to Cs1, electrode)
Sense pin (to Cs1)
Sense pin (to Cs2, electrode)
Sense pin (to Cs2)
Sense pin (to Cs3, electrode)
Sense pin (to Cs3)
Sense pin (to Cs4, electrode)
Sense pin (to Cs4)
Sense pin (to Cs5, electrode) n/c on QT140
Sense pin (to Cs5) n/c on QT140
Output Option (input pin; 1= open drain)
Adjacent Key Suppression Opt. (input ; 1=AKS)
Channel 1 output, o-d or p-p
Channel 2 output, o-d or p-p
Channel 3 output, o-d or p-p
Channel 4 output, o-d or p-p
Channel 5 output, o-d or p-p (n/c on QT140)
Synchronization pin (I/O pin - pull high with 10K)
Option Mode (Input pin - see Table 2-1)
Option Mode (Input pin - see Table 2-1)
Oscillator output
Oscillator input
Reset pin (active low input)
QT140/150 1.01/1102