SI3012-KS Silicon Laboratories Inc, SI3012-KS Datasheet - Page 26

IC ISOMODEM SYSTEM-SIDE 16SOIC

SI3012-KS

Manufacturer Part Number
SI3012-KS
Description
IC ISOMODEM SYSTEM-SIDE 16SOIC
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3012-KS

Data Format
V.90
Interface
Serial
Voltage - Supply
3.3 V ~ 5 V
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Baud Rates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

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Si3038
GPIO Pin Status register.
The Si3038 can also be programmed to wake up on
events due to GPIO_A and GPIO_B.
DTMF Dialing
In CTR21 dc termination mode, the DIAL bit in
register 62h should be set during DTMF dialing if the
LCS[3:0] bits are less than 6. Setting this bit increases
headroom for large signals. This bit should not be used
during normal operation or if LCS[3:0] greater than 5.
In Japan dc termination mode the Si3038 attenuates the
transmit
requirements. This attenuation can be removed when
DTMF dialing is desired in this mode. When in the FCC
dc termination mode, the FJM bit in register 62h will
enable the Japan dc termination mode without the
1.7 dB attenuation. Increased distortion may be
observed, which is acceptable during DTMF dialing.
After DTMF dialing is complete, the attenuation should
be enabled by setting the Japan dc termination mode
DCT[1:0]=01b. The FJM bit has no effect in Japan dc
termination mode.
Higher DTMF levels may also be achieved if the
amplitude is increased and the peaks of the DTMF
signal are clipped at digital full scale (as opposed to
wrapping). Clipping the signal will produce some
distortion and intermodulation of the signal. Generally,
somewhat
acceptable during DTMF signaling. Several dB higher
DTMF levels can be achieved with this technique,
compared with a digital full scale peak signal.
Pulse Dialing
Pulse dialing is accomplished by going off- and on-hook
to generate make and break pulses. The nominal rate is
10 pulses per second. Some countries have very tight
specifications for pulse fidelity, including make and
break times, make resistance, and rise and fall times. In
a traditional solid-state dc holding circuit, there are a
number of issues in meeting these requirements.
The Si3038 dc holding circuit has active control of the
on-hook and off-hook transients to maintain pulse
dialing fidelity.
Spark quenching requirements in countries such as
Italy, the Netherlands, South Africa, and Australia deal
with the on-hook transition during pulse dialing. These
tests provide an inductive dc feed, resulting in a large
voltage spike. This spike is caused by the line
inductance and the sudden decrease in current through
the loop when going on-hook. The traditional way of
dealing with this problem is to put a parallel RC shunt
across the hookswitch relay. The capacitor is large
(~1 uF, 250 V) and relatively expensive. In the Si3038,
26
output
increased
by
1.7 dB
distortion
to
(up
meet
to
headroom
10%)
Rev. 2.01
is
the OHS bit in register 5Ch can be used to slowly ramp
down the loop current to pass these tests without
requiring additional components.
Billing Tone Detection
"Billing tones" or "Metering Pulses" generated by the
central office can cause modem connection difficulties.
The billing tone is typically either a 12 KHz or 16 KHz
signal and is sometimes used in Germany, Switzerland,
and South Africa. Depending on line conditions, the
billing tone may be large enough to cause major errors
related to the modem data. The Si3038 chipset has a
feature which allows the device to remain off-hook
during billing tones and provide feedback as to whether
a billing tone has occurred and when it ends.
Billing tone detection is enabled by setting the BTE bit
(register 5Ch). Billing tones less than 1.1 V
will be filtered out by the low pass digital filter on the
Si3038. The ROV bit is set when a line signal is greater
than 1.1 V
BTD bit is set when a line signal (billing tone) is large
enough to excessively reduce the internal power supply
of the line-side device (Si3014). When the BTD bit is
set, the dc termination is released to maintain an off
hook condition, and the line is presented with an 800 Ω
dc impedance.
The OVL bit should be monitored (polled) following a
billing tone detection. When the OVL bit returns to zero,
indicating that the billing tone has passed, the BTE bit
should be written to zero to return the dc termination to
its original state. It will take approximately one second to
return to normal dc operating conditions. The BTD and
ROV bits are sticky, and they must be written to zero to
be reset. After the BTE, ROV, and BTD bits are all
cleared, the BTE bit can be set to reenable billing tone
detection.
Certain line events, such as an off-hook event on a
parallel phone or a polarity reversal, may trigger the
ROV or the BTD bits, after which the billing tone detector
must be reset. The user should look for multiple events
before qualifying whether billing tones are actually
present.
PK
, indicating an ADC overload condition. The
PK
on the line

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