SI3008-B-FS Silicon Laboratories Inc, SI3008-B-FS Datasheet - Page 15

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SI3008-B-FS

Manufacturer Part Number
SI3008-B-FS
Description
IC ISOMODEM FCC LINE-SIDE 8SOIC
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI3008-B-FS

Data Format
V.22, V23, V.32, V.34, V.90, Bell 103, Bell 212A
Baud Rates
56k
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Product
Modem Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3008-B-FS
Manufacturer:
SILICONI/矽睿科技
Quantity:
20 000
4.4.2. Off-Hook Intrusion Detection
After it is determined that it is safe to use the phone line
without interrupting a call, the host can instruct the
ISOmodem chipset to begin a call or go off-hook.
However, once the call has begun and the ISOmodem
chipset is in data mode, the serial port is used for
modem data, making it difficult for the host to monitor
registers. Therefore, when the ISOmodem chipset is off-
hook, an algorithm is implemented to automatically
monitor the TIP-RING loop current via the LCS register
(SF3).
significantly when off-hook, TIP-RING current is a better
indicator of another device using the phone line. The
LCS[7:0] bits have a resolution of 1.1 mA per bit. An
LCS register value of 0x00 indicates that less than the
required loop current is present, and a value of 0xFF
indicates excessive current draw. The user can read
these bits directly through the LCS register. Upon
detecting an intrusion, an "i" result code is sent to the
host if it is in the call negotiation stage or command
mode. Otherwise, the modem can be programmed to
generate an interrupt to notify the host of the intrusion.
The off-hook intrusion algorithm monitors the value of
LCS (SF3) at a sample rate determined by the DGSR
(SDF, bits 6:0) register (40 ms units). The algorithm
compares each LCS sample to the reference value in
the ACL register (S12). If LCS is lower than ACL by an
amount greater than DCL (S11, bits 4:0), the algorithm
waits for another LCS sample, and if the next LCS
sample is also lower than ACL by an amount greater
than DCL, an interrupt occurs. This helps the
ISOmodem chipset avoid a false parallel phone
detection (PPD) interrupt due to glitches on the phone
line. The ACL is continually updated with the value of
LCS as outlined below. The algorithm can be outlined
as follows:
If
then ACL = LCS(t)
If
an intrusion is sent to the host.
The very first sample of LCS the algorithm uses after
going off-hook does not have any previous samples for
comparison. If LCS was measured during a previous
call, this value of LCS may be used as an initial
reference. ACL may be written by the host with this
known value of LCS. If ACL is non-zero, the ISOmodem
chipset uses ACL as the first valid LCS sample in the
LCS(t) = LCS(t – 40 ms x DGSR)
LCS(t) – ACL > DCL
(ACL – LCS[t – 40 ms x DGSR]) > DCL)
and
(ACL – LCS[t]) > DCL),
and
Because
the
TIP-RING
voltage
drops
Rev. 1.1
off-hook intrusion algorithm. If ACL is 0 (default after
reset), the ISOmodem chipset ignores the register and
does not begin operating the algorithm until two LCS
samples have been received. Additionally, immediately
after a modem call, ACL is updated automatically with
the last valid LCS value before a parallel phone
detection (PPD) intrusion or going back on-hook.
The off-hook intrusion algorithm does not begin to
operate immediately after going off-hook. This is to
avoid triggering an interrupt due to transients resulting
from the ISOmodem chipset itself going from on-hook to
off-hook. The time that elapses between the ISOmodem
chipset going off-hook and the intrusion algorithm
starting defaults to one second and may be adjusted via
the IST register (S82, bits 7:4). If ACL is written to a
non-zero value before going off-hook, a parallel phone
intrusion that occurs during this IST interval and
sustains through the end of the interval triggers an
interrupt.7
The off-hook intrusion algorithm may, additionally, be
disabled for a period of time after dialing begins via the
IB register (S82, bits 2:1). This avoids triggering an
interrupt due to pulse dialing, open-switch intervals, or
line transients from central office switching. Intrusion
may be disabled from the start of dialing to the end of
dialing (IB = Dl
of the IS (S29, bits 7:0) by setting IB = 10
from the start of dial to carrier detect by setting IB = 11.
The off-hook intrusion algorithm is only suspended (not
disabled) during this IB interval. Therefore, any intrusion
that occurs during the IB interval and sustains through
the end of the interval triggers a PPD interrupt.
4.5. Interrupt Detection
The INT interrupt pin can be programmed to alert the
host
current, parallel phone detection, and other interrupts
listed in the interrupt status mask (S08). After the host
receives an interrupt via the INT pin, the host should
issue the AT:I command. This command causes a read-
clear of the WOR, PPD, NLD, RI, OCD, and REV bits of
the S09 register and raises (deactivates) the INT pin. All
the interrupt status bits in register S09 remain high after
being set until cleared by the AT:I command.
4.5.1. Loop Current Detection
In addition to monitoring parallel phone intrusion, it is
possible to monitor the loss of loop current. This feature
can be enabled by setting S08[4] (NLDM) = 1. This
feature is disabled by default. If the loop current is too
low for normal DAA operation, S09[4] (NLD) is set.
During this event, if the NLR result code is enabled by
setting S62[1](NLR) = 1, the “l” result code is sent. Once
the loop current returns to a normal current state, the “L”
of
loss-of-carrier,
b
), from the start of dialing to the timeout
Si2401/Si3008
loss-of-phone-line
b
(IB = 2) or
voltage/
15

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