MAX7324AEG+T Maxim Integrated Products, MAX7324AEG+T Datasheet - Page 11

• Manufacturer Part Number: MAX7324AEG+T
• Description: IC I/O EXPANDER I2C 8B 24QSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX7324AEG+T

• Interface: I²C
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 1.71 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-QSOP
• Includes: POR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The acknowledge bit is a clocked 9th bit the recipient
uses to acknowledge receipt of each byte of data
(Figure 4). Each byte transferred effectively requires 9
bits. The master generates the 9th clock pulse, and the
recipient pulls down SDA during the acknowledge
clock pulse, such that the SDA line is stable low during
the high period of the clock pulse. When the master is
transmitting to the MAX7324, the MAX7324 generates
the acknowledge bit because the MAX7324 is the
recipient. When the MAX7324 is transmitting to the
master, the master generates the acknowledge bit
because the master is the recipient. The master does
not generate an acknowledge prior to issuing a stop
condition.
The MAX7324 has two different 7-bit slave addresses
(Tables 2 and 3). The addresses are different for com-
municating to either the eight push-pull outputs or the
eight inputs. The eighth bit following the 7-bit slave
address is the R/W bit. It is low for a write command
and high for a read command.
Figure 4. Acknowledge
Figure 5. Slave Address
I
TRANSMITTER
2
RECEIVER
.
SDA
SCL
SDA BY
SDA BY
C Port Expander with Eight Push-Pull Outputs
SCL
CONDITION
START
S
MSB
1
______________________________________________________________________________________
1
A5
2
FOR ACKNOWLEDGEMENT
A4
CLOCK PULSE
Slave Address
8
Acknowledge
A3
9
A2
The first (A6), second (A5), and third (A4) bits of the
MAX7324 slave address are always 1, 1, and 0 (I0–I7)
or 1, 0, and 1 (O8–O15). Connect AD0 and AD2 to
GND, V+
A3, A2, A1, and A0. The MAX7324 has 16 possible
slave address pairs (Tables 2 and 3), allowing up to 16
MAX7324 devices on an I
The MAX7324 is accessed though an I
MAX7324 provides two different 7-bit slave addresses
for either the eight input ports (I0–I7) or the eight push-
pull ports (O8–O15). See Tables 2 and 3.
A single-byte read from the input ports of the
MAX7324 returns the status of the eight ports and
clears both the internal transition flags and the INT out-
put. A single-byte read from the output ports of the
MAX7324 returns the status of the eight output ports,
read back as inputs.
A 2-byte read from the input ports of the MAX7324
returns the status of the eight ports (as for a single-byte
read), followed by the transition flags. The internal tran-
sition flags and the INT output are cleared when the
MAX7324 acknowledges the slave address byte, but
the previous transition flag data is sent as the second
byte. A 2-byte read from the output ports of the
MAX7324 repeatedly returns the status of the eight out-
put ports, read back as inputs.
A multibyte read (more than 2 bytes before the I
STOP bit) from the input ports of the MAX7324 repeat-
edly returns the port data, alternating with the transition
flags. As the input data is resampled for each transmis-
sion, and the transition flags are reset each time, a
multibyte read continuously returns the current data
and identifies any changing input ports.
,
A1
SDA, or SCL to select the slave address bits
and Eight Inputs
LSB
A0
2
C bus.
Accessing the MAX7324
R/W
2
C interface. The
ACK
2
11
C