PCA9673PW,118 NXP Semiconductors, PCA9673PW,118 Datasheet - Page 20

• Manufacturer Part Number: PCA9673PW,118
• Description: IC I/O EXPANDER I2C 16B 24TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9673PW,118

• Package / Case: 24-TSSOP
• Interface: I²C
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 1MHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 600 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Output Current: 50 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935283558118; PCA9673PW-T; PCA9673PW-T

NXP Semiconductors
[1]
[2]
[3]
13. Dynamic characteristics
Table 6.
V
PCA9673_1
Product data sheet
Symbol Parameter
f
t
t
t
t
t
t
t
t
t
t
t
t
t
Port timing; C
t
t
t
Interrupt timing; C
t
t
Reset timing (see
t
t
t
SCL
BUF
HD;STA
SU;STA
SU;STO
HD;DAT
VD;ACK
VD;DAT
SU;DAT
LOW
HIGH
f
r
SP
v(Q)
su(D)
h(D)
v(D)
d(rst)
w(rst)
rec(rst)
rst
DD
The power-on reset circuit resets the I
Each bit must be limited to a maximum of 25 mA and the total package limited to 400 mA due to internal busing limits.
The value is not tested, but verified on sampling basis.
= 2.3 V to 5.5 V; V
SCL clock frequency
bus free time between a
STOP and START condition
hold time (repeated) START
condition
set-up time for a repeated
START condition
set-up time for STOP
condition
data hold time
data valid acknowledge
time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL
clock
fall time of both SDA and
SCL signals
rise time of both SDA and
SCL signals
pulse width of spikes that
must be suppressed by the
input filter
data output valid time
data input set-up time
data input hold time
data input valid time
reset delay time
reset pulse width
reset recovery time
reset time
Dynamic characteristics
[1]
L
100 pF (see
Figure
L
[6]
SS
100 pF (see
[2]
= 0 V; T
27)
Figure 16
amb
Figure 16
= 40 C to +85 C; unless otherwise specified.
2
C-bus logic with V
Conditions
and
Remote 16-bit I/O expander for Fm+ I
Figure
and
Rev. 01 — 1 February 2007
Figure
17)
DD
[4][5]
< V
17)
Standard mode
POR
Min
300
250
100
4.7
4.0
4.7
4.0
0.3
4.7
4.0
0
0
0
4
4
0
-
-
-
-
-
-
and set all I/Os to logic 1 (with current source to V
I
2
C-bus
1000
Max
3.45
100
300
50
4
4
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
20 + 0.1C
20 + 0.1C
Fast mode I
Min
100
100
1.3
0.6
0.6
0.6
0.1
1.3
0.6
50
0
0
0
4
4
0
-
-
-
-
2
C-bus with interrupt and reset
b
b
[3]
[3]
2
C-bus
Max
400
300
300
0.9
50
4
4
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Plus I
0.26
0.26
0.26
0.05
0.26
PCA9673
Min
100
0.5
0.5
Fast-mode
50
50
© NXP B.V. 2007. All rights reserved.
0
0
0
4
4
0
-
-
-
-
-
-
2
DD
C-bus
1000
).
Max
0.45
450
120
120
50
4
4
4
-
-
-
-
-
-
-
-
-
-
-
-
-
20 of 33
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s