PCA9557D,112 NXP Semiconductors, PCA9557D,112 Datasheet - Page 16

• Manufacturer Part Number: PCA9557D,112
• Description: IC I/O EXPANDER I2C 8B 16SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9557D,112

• Package / Case: 16-SOIC (3.9mm Width)
• Interface: I²C, SMBus
• Number Of I /o: 8
• Interrupt Output: No
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA9557
• Number Of Lines (input / Output): 8.0 / 8.0
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 200 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5 V
• Logic Type: I2C, SMBus
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8.0
• Number Of Output Lines: 8.0
• Output Current: 50 mA
• Output Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1060-5; 935270674112; PCA9557D

NXP Semiconductors
12. Dynamic characteristics
Table 11.
[1]
[2]
[3]
PCA9557
Product data sheet
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
Port timing
t
t
t
Reset timing
t
t
t
SCL
BUF
HD;STA
SU;STA
SU;STO
HD;DAT
VD;ACK
VD;DAT
SU;DAT
LOW
HIGH
f
r
SP
v(Q)
su(D)
h(D)
w(rst)
rec(rst)
rst
t
t
C
VD;ACK
VD;DAT
b
= total capacitance of one bus line in pF.
= minimum time for SDA data out to be valid following SCL LOW.
= time for acknowledgement signal from SCL LOW to SDA (out) LOW.
Parameter
SCL clock frequency
bus free time between a STOP and
START condition
hold time (repeated) START condition
set-up time for a repeated START
condition
set-up time for STOP condition
data hold time
data valid acknowledge time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
fall time of both SDA and SCL signals
rise time of both SDA and SCL signals
pulse width of spikes that must be
suppressed by the input filter
data output valid time
data input set-up time
data input hold time
reset pulse width
reset recovery time
reset time
Dynamic characteristics
Rev. 06 — 11 June 2008
Conditions
pin IO0
pins IO1 to IO7
[1]
[2]
8-bit I
Standard-mode
Min
250
200
400
4.7
4.0
4.7
4.0
4.7
4.0
0
0
0
6
0
-
-
-
-
-
-
-
I
2
2
C-bus
C-bus and SMBus I/O port with reset
1000
Max
100
300
250
200
50
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
20 + 0.1C
20 + 0.1C
Fast-mode I
Min
100
200
400
1.3
0.6
0.6
0.6
1.3
0.6
0
0
0
6
0
-
-
-
-
-
PCA9557
© NXP B.V. 2008. All rights reserved.
b
b
[3]
[3]
2
C-bus
Max
400
300
300
250
200
0.9
0.9
50
-
-
-
-
-
-
-
-
-
-
-
-
-
16 of 26
Unit
kHz
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s