PCA9557PW,118 NXP Semiconductors, PCA9557PW,118 Datasheet - Page 11

IC I/O EXPANDER I2C 8B 16TSSOP

PCA9557PW,118

Manufacturer Part Number
PCA9557PW,118
Description
IC I/O EXPANDER I2C 8B 16TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9557PW,118

Package / Case
16-TSSOP
Interface
I²C, SMBus
Number Of I /o
8
Interrupt Output
No
Frequency - Clock
400kHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA9557
Number Of Lines (input / Output)
8.0 / 8.0
Operating Supply Voltage
2.3 V to 5.5 V
Power Dissipation
200 mW
Operating Temperature Range
- 40 C to + 85 C
Input Voltage
5 V
Logic Type
I2C, SMBus
Maximum Clock Frequency
400 KHz
Mounting Style
SMD/SMT
Number Of Input Lines
8.0
Number Of Output Lines
8.0
Output Current
50 mA
Output Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1061-2
935270669118
PCA9557PW-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA9557PW,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCA9557
Product data sheet
Fig 14. Write to output port register
Fig 15. Write to I/O configuration or polarity inversion registers
SDA
write to port
data out from port
SDA
SCL
SCL
S
START condition
S
START condition
1
1
0
0
8.4 Bus transactions
2
2
0
0
slave address
slave address
3
3
1
1
Data is transmitted to the PCA9557 registers using Write Byte transfers (see
and
transfers (see
Fig 13. Acknowledgement on the I
4
4
1 A2 A1 A0
1 A2 A1 A0
Figure
5
5
6
6
7
7
SCL from master
15). Data is read from the PCA9557 registers using Read and Receive Byte
R/W
R/W
8
8
0
by transmitter
0
Figure 16
data output
by receiver
data output
9
9
A
acknowledge
from slave
A
acknowledge
from slave
0
0
0
0
Rev. 06 — 11 June 2008
and
condition
command byte
command byte
START
0
0
S
0
0
Figure
0
0
0
0
2
C-bus
17).
0
1 1/0
1
1
A
acknowledge
from slave
A
acknowledge
from slave
8-bit I
2
2
C-bus and SMBus I/O port with reset
data to register
data to port
DATA 1
DATA
acknowledgement
not acknowledge
clock pulse for
acknowledge
8
t
v(Q)
A
acknowledge
from slave
A
acknowledge
from slave
PCA9557
© NXP B.V. 2008. All rights reserved.
002aaa987
DATA 1 VALID
STOP
condition
P
9
STOP
condition
P
002aad281
002aad282
Figure 14
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