LTC1164CSW Linear Technology, LTC1164CSW Datasheet - Page 8

IC FILTER BUILDING BLOCK 24-SOIC

LTC1164CSW

Manufacturer Part Number
LTC1164CSW
Description
IC FILTER BUILDING BLOCK 24-SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1164CSW

Filter Type
Universal Switched Capacitor
Frequency - Cutoff Or Center
20kHz
Number Of Filters
4
Max-order
8th
Voltage - Supply
±2.37 V ~ 8 V
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
LTC1164CS

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Part Number:
LTC1164CSW#PBF
Manufacturer:
Linear Technology
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Manufacturer:
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APPLICATIO S I FOR ATIO
ANALOG CONSIDERATIONS
1. Grounding and Bypassing
The LTC1164 should be used with separated analog
and digital ground planes and single point grounding
techniques.
Pin 6 (AGND) should be tied directly to the analog ground
plane.
Pin 7 (V
0.1µF ceramic disk with leads as short as possible. Pin 19
(V
single supply applications, V
ground plane.
For good noise performance, V
noise and ripple.
All analog inputs should be referenced directly to the
single point ground. The clock inputs should be shielded
from and/or routed away from the analog circuitry and a
separate digital ground plane used.
LTC1164
8
) should be bypassed with a 0.1µF ceramic disk. For
+
) should be bypassed to the ground plane with a
U
CERAMIC
GROUND
ANALOG
PLANE
0.1µF
DISK
7.5V
U
Figure 3. Example Ground Plane Breadboard Technique for LTC1164
can be tied to the analog
+
and V
W
10
11
12
1
2
3
4
5
6
7
8
9
must be free of
• PIN 1 DENT
U
16
24
23
22
21
20
19
18
17
15
14
13
–7.5V
Figure 3 shows an example of an ideal ground plane design
for a two sided board. Of course this much ground
plane will not always be possible, but users should strive
to get as close to this as possible. Proto boards are not
recommended.
2. Buffering the Filter Output
When driving coaxial cables and 1x scope probes, the filter
output should be buffered. This is important
especially when high Qs are used to design a specific filter.
Inadequate buffering may cause errors in noise,
distortion, Q, and gain measurements. When 10x probes
are used, buffering is usually not required. A buffer is
recommended especially when THD tests are performed.
As shown in Figure 4, the buffer should be adequately
bypassed to minimize clock feedthrough.
0.1µF CERAMIC DISK
NOTE: CONNECT ANALOG AND DIGITAL
GROUND PLANES AT A SINGLE POINT AT
THE BOARD EDGE
FOR BEST HIGH FREQUENCY RESPONSE
PLACE RESISTORS PARALLEL TO DOUBLE
SIDED COPPER CLAD BOARD AND LAY FLAT
(4 RESISTORS SHOWN HERE TYPICAL)
DIGITAL GROUND
V
IN
PLANE
CLOCK
(SINGLE POINT
GROUND)
LTC1164 • AI01
1164fa

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