HMP8156ACNZ Intersil, HMP8156ACNZ Datasheet - Page 24

• Manufacturer Part Number: HMP8156ACNZ
• Description: IC VIDEO ENCODER NTSC/PAL 64MQFP
• Manufacturer: Intersil
• Type: NTSC/PAL Encoderr

Specifications of HMP8156ACNZ

• Applications: Multimedia, Video Editing
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 64-MQFP, 64-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pinout
Pin Descriptions
P16-P23
HSYNC
VSYNC
P0-P15
BLANK
NAME
FIELD
RESV
PIN
58, 55-43,
32-27, 23,
NUMBER
38, 37
PIN
22
21
34
35
36
33
24
NTSC/PAL1
NTSC/PAL2
OUTPUT
INPUT/
VAA
GND
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
VAA
VAA
VAA
VAA
O
Y/G
C/B
I
I
I
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Pixel input pins. See Table 1. Any pixel inputs not used should be connected to GND.
Overlay or pixel inputs. See Table 1. Any overlay or pixel inputs not used should be
connected to GND.
This pin is reserved and should be connected to VCC or GND.
FIELD output. The field output indicates that the encoder is outputting the odd or even video
field. The polarity of FIELD is programmable.
Horizontal sync input/output. As an input, this pin must be asserted during the horizontal
sync intervals. If it occurs early, the line time will be shortened. If it occurs late, the line time
will be lengthened by holding the outputs at the front porch level. As an output, it is
asserted during the horizontal sync intervals. The polarity of HSYNC is programmable. If
not driven, the circuit for this pin should include a 4-12kΩ pull up resistor connected to
VAA.
Vertical sync input/output. As an input, this pin must be asserted during the vertical sync
intervals. If it occurs early, the field time will be shortened. If it occurs late, the field time
will be lengthened by holding the outputs at the blanking level. As an output, it is asserted
during the vertical sync intervals. The polarity of VSYNC is programmable. If not driven,
the circuit for this pin should include a 4-12kΩ pull up resistor connected to VAA.
Composite blanking input/output. As an input, this pin must be asserted during the
horizontal and vertical blanking intervals. As an output, it is asserted during the horizontal
and vertical blanking intervals. The polarity of BLANK is programmable. If not driven, the
circuit for this pin should include a 4-12kΩ pull up resistor connected to VAA.
HMP8154, HMP8156A
HMP8154/HMP8156A
TOP VIEW
(PQFP)
DESCRIPTION
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P8
P9
P10
P11
P12
P13
GND
CLK2
VAA
CLK
P14
P15
VSYNC
HSYNC
FIELD
BLANK
August 20, 2009
FN4343.5