ADV7188BSTZ Analog Devices Inc, ADV7188BSTZ Datasheet - Page 25

• Manufacturer Part Number: ADV7188BSTZ
• Description: IC DECODER VID MULTIFORM 80LQFP
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7188BSTZ

• Applications: Set-Top Boxes, Video Players, Recorders
• Voltage - Supply, Analog: 3.15 V ~ 3.45 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 80-LQFP
• Resolution (bits): 12bit
• Input Format: Analog
• Output Format: Digital
• Adc Sample Rate: 54MSPS
• No. Of Input Channels: 12
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SYNC PROCESSING
The ADV7188 extracts syncs embedded in the video data
stream. There is currently no support for external HS/VS
inputs. The sync extraction is optimized to support imperfect
video sources, such as videocassette recorders with head
switches. The actual algorithm used employs a coarse detection
based on a threshold crossing, followed by a more detailed
detection using an adaptive interpolation algorithm. The raw
sync information is sent to a line-length measurement and
prediction block. The output of this block is then used to drive
the digital resampling section to ensure that the ADV7188
outputs 720 active pixels per line.
The sync processing on the ADV7188 also includes the following
specialized postprocessing blocks that filter and condition the raw
sync information retrieved from the digitized analog video.
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VBI DATA RECOVERY
The ADV7188 can retrieve the following information from the
input video:
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The ADV7188 is also capable of automatically detecting the
incoming video standard with respect to
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The ADV7188 can configure itself to support PAL
(B/G/H/I/D/M/N), PAL Combination N, NTSC M, NTSC J,
SECAM 50 Hz/60 Hz, NTSC 4.43, and PAL 60.
Vsync Processor. This block provides extra filtering of the
detected vsyncs to improve the vertical lock.
Hsync Processor. The hsync processor is designed to filter
incoming hsyncs that have been corrupted by noise,
providing much improved performance for video signals
with a stable time base but poor SNR.
Wide-screen signaling (WSS)
Copy generation management system (CGMS)
Closed captioning (CC)
Macrovision protection presence
Gemstar-compatible data slicing
Teletext
VITC/VPS
Color subcarrier frequency
Field rate
Line rate
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GENERAL SETUP
Video Standard Selection
The VID_SEL [3:0] bits allow the user to force the digital core
into a specific video standard. Under normal circumstances, this
should not be necessary. The VID_SEL [3:0] bits default to an
autodetection mode that supports PAL, NTSC, SECAM, and
variants thereof. The following section describes the autodetec-
tion system.
Autodetection of SD Modes
To guide the autodetection system, individual enable bits are
provided for each of the supported video standards. Setting the
relevant bit to 0 inhibits the standard from being automatically
detected. Instead, the system selects the closest of the remaining
enabled standards. The results of the autodetection can be read
back via the status registers. See the Global Status Registers
section for more information.
VID_SEL [3:0], Address 0x00 [7:4]
Table 24. VID_SEL Function
VID_SEL [3:0]
0000 (default)
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Description
Autodetect PAL (B/G/H/I/D),
NTSC (without pedestal), SECAM
Autodetect PAL (B/G/H/I/D),
NTSC M (with pedestal), SECAM
Autodetect PAL N (without pedestal),
NTSC M (without pedestal), SECAM
Autodetect PAL N (with pedestal),
NTSC M (with pedestal), SECAM
NTSC J (1)
NTSC M (1)
PAL 60
NTSC 4.43 (1)
PAL B/G/H/I/D
PAL N (PAL B/G/H/I/D without pedestal)
PAL M (without pedestal)
PAL Combination N
PAL Combination N (with pedestal)
SECAM
SECAM (with pedestal)
PAL M
ADV7188