ADV7173KSTZ Analog Devices Inc, ADV7173KSTZ Datasheet - Page 36

• Manufacturer Part Number: ADV7173KSTZ
• Description: IC DAC VIDEO NTSC 6-CH 48LQFP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7173KSTZ

• Applications: Multimedia
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Input Format: Digital
• Output Format: Analog
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Tv / Video Case Style: LQFP
• No. Of Pins: 48
• Msl: MSL 1 - Unlimited
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADV7173EBM - BOARD EVAL FOR ADV7173
• Voltage - Supply, Digital: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADV7172/ADV7173
SUBCARRIER FREQUENCY REGISTERS 3–0
(FSC3–FSC0)
(Address (SR4–SR0) = 0CH–0FH)
These 8-bit-wide registers are used to set up the subcarrier
frequency. The value of these registers is calculated by using the
following equation:
Example: NTSC Mode,
Figure 54 shows how the frequency is set up by the four
registers.
SUBCARRIER PHASE REGISTER (FP7–FP0)
(Address (SR4–SR0) = 10H)
This 8-bit-wide register is used to set up the subcarrier phase.
Each bit represents 1.41°. For normal operation this register is
set to 00Hex.
CLOSED CAPTIONING EVEN FIELD
DATA REGISTER 1–0 (CED15–CED0)
(Address (SR4–SR0) = 11–12H)
These 8-bit wide registers are used to set up the closed captioning
extended data bytes on even fields. Figure 55 shows how the
high and low bytes are set up in the registers.
SUBCARRIER
SUBCARRIER
SUBCARRIER
SUBCARRIER
f
f
FREQUENCY
FREQUENCY
FREQUENCY
FREQUENCY
CLK
SCF
BYTE 1
BYTE 0
Subcarrier FrequencyValue =
= 3.5795454 MHz
= 27 MHz,
REG 2
REG 1
REG 0
REG 3
Subcarrier Frequency
CED15
CED7
FSC23
FSC15
FSC31
FSC7
CED14 CED13
CED6
FSC22 FSC21
FSC14 FSC13
FSC30 FSC29
FSC6
= 21F07C16 HEX
CED5
FSC5
CED12
CED4
Re
FSC20
FSC12
FSC28
FSC4
27 10
gister
2
CED11
CED3
32
×
FSC19
FSC11
–
FSC27
FSC3
=
1
6
2
CED10
×
CED2
f
32
CLK
3 579454 10
FSC10
FSC18
FSC26
FSC2
–1
.
×
CED9
CED1
f
SCF
FSC17
FSC25
FSC1
FSC9
×
CED8
CED0
FSC24
FSC16
FSC8
FSC0
6
CLOSED CAPTIONING ODD FIELD
DATA REGISTER 1–0 (CCD15–CCD00)
(Subaddress (SR4–SR0) = 13–14H)
These 8-bit-wide registers are used to set up the closed captioning
data bytes on odd fields. Figure 56 shows how the high and low
bytes are set up in the registers.
NTSC PEDESTAL/PAL TELETEXT CONTROL
REGISTERS 3–0 (PCE15–0, PCO15–0)/(TXE15–0, TXO15–0)
(Subaddress (SR4–SR0) = 15–18H)
These 8-bit-wide registers are used to enable the NTSC pedes-
tal/PAL Teletext on a line-by-line basis in the vertical blanking
interval for both odd and even fields. Figures 57 and 58 show
the four control registers. A Logic “1” in any of the bits of
these registers has the effect of turning the Pedestal OFF on
the equivalent line when used in NTSC. A Logic “1” in any of
the bits of these registers has the effect of turning Teletext ON
on the equivalent line when used in PAL.
FIELD 2/4
FIELD 2/4
FIELD 2/4
FIELD 2/4
FIELD 1/3
FIELD 1/3
FIELD 1/3
FIELD 1/3
BYTE 0
BYTE 1
LINE 17 LINE 16 LINE 15 LINE 14 LINE 13 LINE 12 LINE 11 LINE 10
LINE 25 LINE 24 LINE 23 LINE 22 LINE 21 LINE 20 LINE 19 LINE 18
LINE 14 LINE 13 LINE 12 LINE 11 LINE 10 LINE 9
LINE 22 LINE 21 LINE 20 LINE 19 LINE 18 LINE 17 LINE 16 LINE 15
LINE 25 LINE 24 LINE 23 LINE 22 LINE 21 LINE 20 LINE 19 LINE 18
LINE 22 LINE 21 LINE 20 LINE 19 LINE 18 LINE 17 LINE 16 LINE 15
LINE 17 LINE 16 LINE 15 LINE 14 LINE 13 LINE 12 LINE 11 LINE 10
PCE15
LINE 14 LINE 13 LINE 12 LINE 11 LINE 10 LINE 9
TXE15
CCD15
PCO15
TXO15
CCD7
PCE7
PCO7
TXE7
TXO7
CCD14
PCE14
CCD6
PCO14 PCO13
TXE14
TXO14 TXO13
PCE6
PCO6
TXE6
TXO6
CCD13
CCD5
PCE13
TXE13
PCE5
PCO5
TXE5
TXO5
CCD12
CCD4
PCE12
TXE12
PCO12
TXO12
PCE4
PCO4
TXE4
TXO4
CCD11
CCD3
PCE11
TXE11
PCO11
TXO11
PCE3
PCO3
TXE3
TXO3
CCD10
CCD2
PCE10
TXE10
PCO10
TXO10
PCE2
PCO2
TXE2
TXO2
CCD1
CCD9
LINE 8
PCE9
PCO9
PCE1
LINE 8
TXE9
PCO1
TXO9
TXE1
TXO1
CCD0
CCD8
LINE 7
PCE8
PCO8
PCE0
LINE 7
TXE8
PCO0
TXO8
TXE0
TXO0