AD723ARUZ Analog Devices Inc, AD723ARUZ Datasheet - Page 9

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AD723ARUZ

Manufacturer Part Number
AD723ARUZ
Description
IC ENCODER RGB-NTSC/PAL 28-TSSOP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of AD723ARUZ

Applications
Cameras, Internet Appliances, Set-Top Boxes
Voltage - Supply, Digital
2.7 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Screening Level
Industrial
Package Type
TSSOP
Pin Count
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

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After the luma prefilter, the bandlimited luma signal is sampled
onto a set of capacitors at twice the master reference clock rate.
After an appropriate delay, the data is read from the delay line,
reconstructing the luma signal. The 8FSC oversampling of this
delay line limits the amount of jitter in the reconstructed sync
output. The clocks driving the delay line are reset once per
video line during the burst flag. The output of the luma path
will remain unchanged during this period and will not respond
to changing RGB inputs.
The reconstructed luma signal is then smoothed with a 4-pole
low-pass filter. This filter has a –3 dB bandwidth of 7.5 MHz for
NTSC (9 MHz for PAL), and is of a modified Bessel form with
some high frequency boost introduced to compensate for Sinx/x
roll-off in the sampled delay line. A final current mode buffer
provides current drive for the LUMA output pin. The combined
response of the luma input filter, delay line, and output filter has
a bandwidth of 4.7 MHz for NTSC and 6.1 MHz for PAL.
Chrominance Signal Path
The chrominance path begins with the U and V color-difference
matrices. The AD723 uses U and V modulation vectors for NTSC
and PAL (+U being defined as 0 degrees phase), simplifying the
design compared to I and Q designs. The U and V matrices com-
bine the RGB inputs by the standard transformations:
The Y signal in these transformations is provided by the lumi-
nance matrix.
Before modulation, the U and V signals are prefiltered to pre-
vent aliasing. These 4-pole modified Bessel low-pass filters have
a –3 dB bandwidth of 1.2 MHz for NTSC and 1.5 MHz for PAL.
Between the prefilters and the modulators, the colorburst vec-
tors are added to the U and V signals. The colorburst levels are
defined according to the encoding standard. For NTSC, the
colorburst is in the –U direction (with no V component) with a
resultant amplitude of 286 mV (40 IRE) at 180 degrees phase.
For PAL, the colorburst has equal parts of –U and ± V vectors
(changing V phase every line) for a resultant amplitude of 300 mV
alternating between 135 and 225 degrees phase.
The burst gate timing is generated by waiting a certain num-
ber of reference clock cycles following the falling sync edge. If
the sync pulsewidth is measured to be outside the standard
horizontal width, it is assumed that the device is in an h/2 period
(vertical blanking interval) and the burst is suppressed.
The U and V signals are used to modulate a pair of quadrature
clocks (sine and cosine) at one-fourth the reference frequency
input (3.579 545 MHz for NTSC, 4.433 618 MHz for PAL).
For PAL operation, the phase of the cosine (V) clock is changed
after each falling sync edge is detected. This will change the
V-vector phase in PAL mode every horizontal line. By driving the
AD723 with an odd number of sync edges per field, any indi-
vidual line will flip phase each field as required by the standard.
U = 0.493 × (B – Y)
V = 0.877 × (R – Y)
In order to suppress the carriers in the chrominance signal, the
U and V modulators are balanced. Once per horizontal line the
offsets in the modulators are cancelled in order to minimize
residual subcarrier when the RGB inputs are equal. This offset
cancellation also provides a dc restore for the U and V signal
paths, so it is important that the RGB inputs be held at black
level during this time. The offset cancellation occurs after each
falling sync edge, approximately 8.4 µs after the falling sync
edge, lasting for a period of 1.0 µs. If the inputs are unbalanced
during this time (for example, if a sync-on-green RGB input
were used), there will be an offset in this chrominance response
of the inputs during the remainder of the horizontal line, includ-
ing the colorburst.
The U signal is sampled by the sine clock and the V signal is
sampled by the cosine clock in the modulators, after which they
are summed to form the chrominance (C) signal.
The chrominance signal then passes through a final 4-pole
modified Bessel low-pass filter to remove the harmonics of the
switching modulation. This filter has a –3 dB frequency of 6 MHz
for NTSC and 8 MHz for PAL. A final buffer provides current
drive for the CRMA output pin.
Composite Output
To provide a composite video output, the separate (S-Video)
luminance and chrominance signal paths are summed. Prior to
summing, however, an optional filter tap for removing cross-
color artifacts in the receiver is provided.
The luminance path contains a resistor, output pin (YTRAP),
and buffer prior to entering the composite summing amplifier.
By connecting an inductor and capacitor on this pin, an R-L-C
series-resonant circuit can be tuned to null out the luminance
response at the chrominance subcarrier frequency (3.579 545 MHz
for NTSC, 4.433 618 MHz for PAL). The center frequency (f
of this filter will be determined by the external inductor and
capacitor by the equation:
It can be seen from this equation that the center frequency of
the trap is entirely dependent on external components. The
ratio of center frequency to bandwidth of the notch (Q = f
BW) can be described by the equation:
When choosing the Q of the filter, it should be kept in mind that
the sharper the notch, the more critical the tolerance of the
components must be in order to target the subcarrier frequency.
Additionally, higher Q notches will exhibit a transient response
with more ringing after a luminance step. The magnitude of this
ringing can be large enough to cause visible shadowing for Q
values much greater than 1.5.
Q =
f
C
=
1000
2 π LC
1
1
L
C
AD723
C
/
C
)

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