MAX3746ETE Maxim Integrated Products, MAX3746ETE Datasheet - Page 8

• Manufacturer Part Number: MAX3746ETE
• Description: Limiting Amplifiers 622Mbps to 3.2Gbps
• Manufacturer: Maxim Integrated Products

Specifications of MAX3746ETE

• Operating Supply Voltage: 3.3 V
• Supply Current: 35 mA
• Operating Temperature Range: + 85 C
• Package / Case: TQFN EP
• Mounting Style: SMD/SMT
• Number Of Channels: 1
• Power Dissipation: 1400 mW
• Lead Free Status / Rohs Status: No

The MAX3746 is equipped with multirate LOS circuitry
that indicates when the input signal is below a pro-
grammable threshold, set by resistor R
(see the Typical Operating Characteristics for appropri-
ate resistor sizing). An averaging RMS power detector
compares the input signal amplitude with this threshold
and feeds the signal-detect information to the open-col-
lector LOS output.
To prevent LOS chatter in the region of the pro-
grammed threshold, approximately 2dB of hysteresis is
built into the LOS assert/deassert function. Once
Low-Power, 622Mbps to 3.2Gbps
Limiting Amplifier
Figure 1. Power-Supply Current Measurement
Figure 3. CML Input Buffer
8
IN+
IN-
Power Detect and Loss-of-Signal Indicator
0.25pF
0.25pF
_______________________________________________________________________________________
STRUCTURES
ESD
V
CC
MAX3746
I
CC
(SUPPLY CURRENT)
50Ω
50Ω
50Ω
V
CC
R
50Ω
TH
TH
I
OUTPUT CURRENT)
OUT
at the TH pin
(CML
asserted, the LOS is not deasserted until the input
amplitude rises to the required level (V
Figures 2 and 5.)
The MAX3746HETE is a MAX3746 in a hybrid lead-free
package. It is a hybrid part, which contains high-lead
bumps inside a lead-free thin QFN package. The part is
not 100% lead free; however, the high-lead solder in
the internal portion of the part does meet the RoHS
exemption for high-lead solders. For more information,
visit www.maxim-ic.com/emmi.
Figure 2. LOS Assert Threshold Set 1dB Below the Minimum by
Receiver Sensitivity for Selected R
Figure 4. CML Output Buffer
I1 = f (OUTPOL, DISABLE)
DISABLE
DATA
0V
V
IN
1dB
6dB
Q3
POWER-DETECT WINDOW
Q4
MAX DEASSERT LEVEL
I2 = f (OUTPOL, DISABLE)
MIN ASSERT LEVEL
SIGNAL OFF
Hybrid Lead-Free Package
SIGNAL ON
50Ω
Q1
TH
V
CC
Q2
50Ω
DEASSERT
TIME
STRUCTURES
). (See
ESD
OUT+
OUT-