SI3010-F-FSR Silicon Laboratories Inc, SI3010-F-FSR Datasheet - Page 55

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SI3010-F-FSR

Manufacturer Part Number
SI3010-F-FSR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3010-F-FSR

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Register 8. PLL Divide N
Reset settings = 0000_0000 (serial mode 0, 1)
Reset settings = 0001_0011 (serial mode 2)
Register 9. PLL Divide M
Reset settings = 0000_0000
Register 10. DAA Control 3
Reset settings = 0000_0000
Bit
7:0
Bit
7:0
Bit
7:1
Name
Name
Name
Type
Type
Type
0
Bit
Bit
Bit
Reserved Read returns zero.
M[7:0]
Name
N[7:0]
Name
Name
DDL
D7
D7
D7
PLL N Divider.
Contains the (value –1) for determining the output frequency on PLL1.
PLL M Divider.
Contains the (value –1) for determining the output frequency on PLL1.
Digital Data Loopback.
0 = Normal operation.
1 = Audio data received on SDI and loops it back out to SDO before the TX and RX filters.
Outputted data is identical to inputted data.
D6
D6
D6
D5
D5
D5
D4
D4
D4
M[7:0]
N[7:0]
R/W
R/W
D3
D3
D3
Rev. 1.05
D2
D2
D2
Function
Function
Function
D1
D1
D1
DDL
R/W
D0
D0
D0
Si3018/19/10
55

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