ISL41387IRZ Intersil, ISL41387IRZ Datasheet - Page 16

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ISL41387IRZ

Manufacturer Part Number
ISL41387IRZ
Description
IC TXRX DUAL PROTOCAL ESD 40-QFN
Manufacturer
Intersil
Type
Transceiverr
Datasheet

Specifications of ISL41387IRZ

Number Of Drivers/receivers
2/2
Protocol
RS422, RS485
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
40-VFQFN, 40-VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Proper termination is imperative to minimize reflections
when using the 20Mbps speed option. Short networks using
the medium and slow speed options need not be terminated,
but terminations are recommended unless power dissipation
is an overriding concern. Note that the RS-485 specification
allows a maximum of two terminations on a network,
otherwise the Tx output voltage may not meet the required
V
In point-to-point, or point-to-multipoint (RS-422) networks,
the main cable should be terminated in its characteristic
impedance (typically 120Ω) at the end farthest from the
driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as
possible, but definitely shorter than the limits shown in
Table 4. Multipoint (RS-485) systems require that the main
cable be terminated in its characteristic impedance at both
ends. Again, keep stubs connecting a transceiver to the
main cable as short as possible, and refer to Table 4. Avoid
“star”, and other configurations, where there are many
“ends” which would require more than the two allowed
terminations to prevent reflections.
High ESD
All pins on the ISL81387, ISL41387 include ESD protection
structures rated at ±4kV (HBM), which is good enough to
survive ESD events commonly seen during manufacturing.
But the bus pins (Tx outputs and Rx inputs) are particularly
vulnerable to ESD events because they connect to an
exposed port on the exterior of the finished product. Simply
touching the port pins, or connecting a cable, can destroy an
unprotected port. ISL81387, ISL41387 bus pins are fitted
with advanced structures that deliver ESD protection in
excess of ±15kV (HBM), without interfering with any signal in
the RS-485 or the RS-232 range. This high level of
protection may eliminate the need for board level protection,
or at the very least will increase the robustness of any board
level scheme.
Small Packages
Many competing dual protocol ICs are available only in
monstrously large 24 to 28 Ld SOIC packages. The
ISL81387’s 20 Ld SSOP is more than 50% smaller than
even a 24 Ld SOIC, and the ISL41387’s tiny 6mmx6mm
QFN is 80% smaller than a 28 Ld SOIC.
Flow Through Pinouts
Even the ISL81387, ISL41387 pinouts are features, in that the
“flow-through” design simplifies board layout. Having the bus
pins all on one side of the package for easy routing to a cable
connector, and the Rx outputs and Tx inputs on the other side
for easy connection to a UART, avoids costly and problematic
crossovers. Figure 10 illustrates the flow-through nature of the
pinout.
OD
.
16
ISL81387, ISL41387
Low Power Shutdown (SHDN) Mode
The ISL81387, ISL41387 enter the SHDN mode when ON = 0,
and the Tx and Rx are disabled (DEN = 0, RXEN = 0, and
RXEN = 1), and the already low supply current drops to as low
as 5µA. SHDN disables the Tx and Rx outputs, and disables
the charge pumps if the port is in RS-232 mode, so V+
collapses to V
All but 5µA of SHDN I
SLEW) pull-up resistors (~20µA/resistor), so SHDN I
varies depending on the ISL81387, ISL41387 configuration.
The specification tables indicate the worst case values, but
careful selection of the configuration yields lower currents.
For example, in RS-232 mode the SPB pin isn’t used, so
floating it or tying it high minimizes SHDN I
On the ISL41387, the SHDN I
decreases. V
its V
stage, but the second stage input isn’t driven to the rail, so
some I
When enabling from SHDN in RS-232 mode, allow at least
20µs for the charge pumps to stabilize before transmitting data.
If fast enables are required, and I
disable the drivers with the DEN pin to keep the charge pumps
active. The charge pumps aren’t used in RS-485 mode, so the
transceiver is ready to send or receive data in less than 1µs,
which is much faster than competing devices that require the
charge pump for all modes of operation.
Internal Loopback Mode
Setting ON = 0, DEN = 1, and RXEN = 1 or RXEN = 0
(QFN only), places the port in the loopback mode, a mode
that facilitates implementing board level self test functions. In
loopback, internal switches disconnect the Rx inputs from
the Rx outputs, and feed back the Tx outputs to the
appropriate Rx output. This way the data driven at the Tx
input appears at the corresponding Rx output (refer to
“Typical Operating Circuit” on page 6). The Tx outputs
remain connected to their terminals, so the external loads
are reflected in the loopback performance. This allows the
loopback function to potentially detect some common bus
faults such as one or both driver outputs shorted to GND, or
outputs shorted together.
FIGURE 10. ILLUSTRATION OF FLOW THROUGH PINOUT
OH
CC
at V
current flows. See Figure 20 for details.
L
L
CC
rather than V
powers each control pin input stage and sets
A
B
Y
Z
, and V- collapses to GND.
CC
ISL81387
R
current is due to control input (SPB,
D
CC
CC
. V
CC
CC
increases as V
RA
DY
isn’t the greatest concern,
powers the second
µCONTROLLER
CC
UART
ASIC
.
OR
OR
November 21, 2007
L
CC
FN6201.3

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