74AHCT595PW Philips Semiconductors, 74AHCT595PW Datasheet

74AHCT595PW

Manufacturer Part Number

74AHCT595PW

Description

8-BIT SHIFT REG W/OUTPUT LATCH

Manufacturer

Philips Semiconductors

Datasheet

1.74AHCT595PW.pdf (8 pages)

Specifications of 74AHCT595PW

Circuit Type

High Speed, Low-Power Schottky, Silicon Gate

Current, Supply

80 μA

Function Type

8-Bits

Logic Function

Shift Register

Logic Type

CMOS/TTL

Package Type

TSSOP-16

Special Features

Schmitt-Trigger, Tri-State

Temperature, Operating, Range

-40 to +125 °C

Voltage, Supply

5 V

Lead Free Status / Rohs Status

RoHS Compliant part Electrostatic Device

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

74AHCT595PW

Manufacturer:

Quantity:

3 223

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1. General description

2. Features

3. Applications

The 74AHC595; 74AHCT595 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard

No. 7A.

The 74AHC595; 74AHCT595 is an 8-stage serial shift register with a storage register and

3-state outputs. The shift register has separate clocks.

Data is shifted on the positive-going transitions of the shift register clock input (SHCP).

The data in each register is transferred to the storage register on a positive-going

transition of the storage register clock input (STCP). If both clocks are connected together,

the shift register will always be one clock pulse ahead of the storage register.

The shift register has a serial input (DS) and a serial standard output (Q7S) for cascading.

It is also provided with asynchronous reset (active LOW) for all 8 shift register stages. The

storage register has 8 parallel 3-state bus driver outputs. Data in the storage register

appears at the output whenever the output enable input (OE) is LOW.

74AHC595; 74AHCT595

8-bit serial-in/serial-out or parallel-out shift register with

output latches; 3-state

Balanced propagation delays

All inputs have Schmitt-trigger actions

Inputs accept voltages higher than V

Input levels:

ESD protection:

Multiple package options

Speciﬁed from 40 C to +85 C and from 40 C to +125 C

Serial-to-parallel data conversion

Remote control holding register

For 74AHC595: CMOS level

For 74AHCT595: TTL level

HBM EIA/JESD22-A114E exceeds 2000 V

MM EIA/JESD22-A115-A exceeds 200 V

CDM EIA/JESD22-C101C exceeds 1000 V

Product data sheet

Related parts for 74AHCT595PW

74AHCT595PW Summary of contents

Page 1

General description The 74AHC595; 74AHCT595 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL speciﬁed in compliance with JEDEC ...

... Package Temperature range 74AHC595 74AHC595D +125 C 74AHC595PW +125 C 74AHC595BQ +125 C 74AHCT595 74AHCT595D +125 C 74AHCT595PW +125 C 5. Functional diagram Fig 1. Functional diagram 74AHC_AHCT595_3 Product data sheet 74AHC595; 74AHCT595 8-bit serial-in/serial-out or parallel-out shift register with output latches Name Description SO16 plastic small outline package; 16 leads; body width 3 ...

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74AHCT595PW Philips Semiconductors, 74AHCT595PW Datasheet

74AHCT595PW

Specifications of 74AHCT595PW

Available stocks

Related parts for 74AHCT595PW

74AHCT595PW Summary of contents

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