74HC74D,652 Philips Semiconductors, 74HC74D,652 Datasheet

74HC74D,652

Manufacturer Part Number

74HC74D,652

Description

FLIP-FLOP; SO-14; 5.0 V (TYP.); -40; +125; 1000 NS (TYP.) TR; 1000 NS (TYP.) TF

Manufacturer

Philips Semiconductors

Datasheet

1.74HC74N652.pdf (8 pages)

Specifications of 74HC74D,652

Circuit Type

Low-Power Schottky, Silicon Gate

Current, Leakage, Input

±1.0 μA (Max.)

Current, Quiescent Supply

40 uA (Max.)

Function Type

4-Inputs, D-Type

Input Fall Time

1000 ns (Typ.)

Input Rise Time

1000 ns (Typ.)

Logic Function

Flip-Flop

Logic Type

CMOS

Number Of Circuits

Dual

Package Type

SO-14

Power Dissipation

500 mW (Max.)

Special Features

Positive-Edge-Triggered

Temperature, Operating, Maximum

125 °C

Temperature, Operating, Minimum

-40 °C

Temperature, Operating, Range

-40 to +125 °C

Voltage, Supply

5 V

Lead Free Status / Rohs Status

RoHS Compliant part Electrostatic Device

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Philips Semiconductors

FEATURES

QUICK REFERENCE DATA

GND = 0 V; T

Notes

1. C

2. For 74HC74 the condition is V

PHL

max

SYMBOL

Wide supply voltage range from 2.0 to 6.0 V

Symmetrical output impedance

High noise immunity

Low power dissipation

Balanced propagation delays

ESD protection:

HBM EIA/JESD22-A114-A exceeds 2000 V

MM EIA/JESD22-A115-A exceeds 200 V.

Dual D-type ﬂip-ﬂop with set and reset;

positive-edge trigger

N = total load switching outputs;

For 74HCT74 the condition is V

= input frequency in MHz;

PLH

= output frequency in MHz;

= output load capacitance in pF;

= C

is used to determine the dynamic power dissipation (P

= supply voltage in Volts;

amb

propagation delay

maximum clock frequency

input capacitance

power dissipation capacitance per ﬂip-ﬂop

nCP to nQ, nQ

nSD to nQ, nQ

nRD to nQ, nQ

= 25 C; t

) = sum of the outputs.

N + (C

= t

PARAMETER

= 6 ns

= GND to V

) where:

1.5 V.

notes 1 and 2

GENERAL DESCRIPTION

The 74HC/HCT74 is a high-speed Si-gate CMOS device

and is pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT74 are dual positive-edge triggered, D-type

flip-flops with individual data (D) inputs, clock (CP) inputs,

set (SD) and reset (RD) inputs; also complementary

Q and Q outputs.

The set and reset are asynchronous active LOW inputs

and operate independently of the clock input. Information

on the data input is transferred to the Q output on the

LOW-to-HIGH transition of the clock pulse. The D inputs

must be stable one set-up time prior to the LOW-to-HIGH

clock transition for predictable operation.

Schmitt-trigger action in the clock input makes the circuit

highly tolerant to slower clock rise and fall times.

= 15 pF; V

in W).

CONDITIONS

= 5 V

74HC74; 74HCT74

3.5

TYPICAL

Product speciﬁcation

3.5

HCT

MHz

UNIT

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74HC74D,652 Summary of contents

Page 1

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger FEATURES Wide supply voltage range from 2.0 to 6.0 V Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. ...

Page 2

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger FUNCTION TABLES Table 1 See note Table 2 See note Note HIGH voltage level LOW voltage level don’t care; = LOW-to-HIGH CP transition; Qn+1 = state after the next LOW-to-HIGH CP transition. ORDERING INFORMATION ...

Page 3

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER V supply voltage CC V input voltage I V output voltage O T operating ambient amb temperature input rise and fall r f times LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). ...

Page 4

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger DC CHARACTERISTICS Family 74HC At recommended operating conditions; voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER +85 C; note 1 amb V HIGH-level input IH voltage V LOW-level input voltage IL V HIGH-level output OH voltage V LOW-level output ...

Page 5

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger AC CHARACTERISTICS Family 74HC GND = ns pF SYMBOL PARAMETER +85 C amb t /t propagation delay PHL PLH nCP to nQ, nQ propagation delay nSD to nQ, nQ propagation delay nRD to nQ output transition time THL TLH ...

Page 6

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger SYMBOL PARAMETER +125 C amb t /t propagation delay PHL PLH nCP to nQ, nQ propagation delay nSD to nQ, nQ propagation delay nRD to nQ output transition time THL TLH t clock pulse width HIGH W or LOW ...

Page 7

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger PACKAGE OUTLINES DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches ...

Page 8

... Philips Semiconductors Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 ...

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