MAX9860ETG+T Maxim Integrated Products, MAX9860ETG+T Datasheet - Page 14

IC CODEC MONO AUD 16BIT 24TQFN

MAX9860ETG+T

Manufacturer Part Number
MAX9860ETG+T
Description
IC CODEC MONO AUD 16BIT 24TQFN
Manufacturer
Maxim Integrated Products
Type
Audio Codecr
Datasheet

Specifications of MAX9860ETG+T

Data Interface
Serial
Resolution (bits)
16 b
Number Of Adcs / Dacs
1 / 2
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
81 / 90
Voltage - Supply, Analog
1.7 V ~ 1.9 V
Voltage - Supply, Digital
1.7 V ~ 1.9 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16-Bit Mono Audio Voice Codec
The MAX9860 is a low-power, voiceband, mono audio
codec designed to provide a complete audio solution
for wireless voice headsets and other mono audio
devices.
The mono playback path accepts digital audio over a
flexible digital audio interface compatible with I
and left-justified audio signals. An oversampling sigma-
delta DAC converts an incoming digital data stream to
analog audio and outputs through the mono bridge-tied
load headphone amplifier.
The stereo record path has two microphone inputs with
selectable gain. The microphones are powered by an
integrated microphone bias. An oversampling sigma-
delta ADC converts the microphone signals and out-
puts the digital bit stream over the digital audio
interface.
The record path includes automatic gain control (AGC)
to optimize the signal level and a noise gate to reduce
idle noise. The automatic gain control monitors the out-
puts of the ADC and makes constant adjustments to the
input gain to reduce the dynamic range of the incoming
microphone signal by up to 20dB. The noise gate cor-
rects for the increase in noise typically associated with
AGC by lowering the gain when there is no audio signal.
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Detailed Description
2
S, TDM,
Integrated digital filtering provides a range of notch and
highpass filters for both the playback and record paths
to limit undesirable low-frequency signals and GSM
transmission noise. The digital filtering provides attenu-
ation of out-of-band energy by up to 76dB, eliminating
audible aliasing. A digital sidetone function allows
audio from the record path to be summed into the play-
back path after digital filtering.
The MAX9860’s flexible clock circuitry utilizes a pro-
grammable clock divider and a digital PLL to allow the
DAC and ADC to operate at maximum dynamic range
for all combinations of master clock (MCLK) and sam-
ple rate (LRCLK). Any master clock between 10MHz to
60MHz is supported as are all sample rates from 8kHz
to 48kHz. Master and slave mode are supported for
maximum flexibility.
The MAX9860 audio codec is completely controlled
through software using an I
default setting is software shutdown, requiring that the
internal registers be programmed to activate the device.
See Table 1 for the device’s complete register map.
The MAX9860 responds to the slave address 0x20 for
all write commands and 0x21 for all read operations.
2
C interface. The power-on
I
2
I
C Slave Address
2
C Registers

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