IDTSTAC9205D3NBEB2XR IDT, Integrated Device Technology Inc, IDTSTAC9205D3NBEB2XR Datasheet - Page 15

• Manufacturer Part Number: IDTSTAC9205D3NBEB2XR
• Description: IC AUDIO CODEC 4CH HD 3.3V 48QFN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec, HDr

Specifications of IDTSTAC9205D3NBEB2XR

• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 98 / 103
• Dynamic Range, Adcs / Dacs (db) Typ: 98 / 95
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 3.8 V ~ 4.2 V; 4.28 V ~ 4.73 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9205D3NBEB2XR

IDT™
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
Digital
STAC9204/9205
4-CHANNEL HD AUDIO CODEC WITH QUAD DIGITAL MICROPHONE INTERFACE
Mics
Power
D0-D3
State
0
1
2
3
4
D0
D1
D2
D3
Double Edge on either DMIC_0 or
and Single Edge on the second
Double Edge on one DMIC pin
Single Edge on DMIC_0 and 1
Double Edge (see Figure 5)
Enabled?
Single Edge (see Figure 3)
Widget
DMIC
Yes
Yes
Yes
Yes
No
1 (see Figure 4)
Data Sample
DMIC pin.
N/A
OR
Clock Disabled
Clock Disabled
Clock Disabled
Clock Disabled
Clock Capable
DMIC_CLK
Table 2. DMIC_CLK, DMIC_0 and DMIC_1 Operation During Power States
Output
Table 1. STAC9205 Valid Digital Microphone Configurations
DMIC_0,1
Disabled
Disabled
Disabled
Disabled
Capable
Conn.
0 or 1
0 or 1
0 or 1
0 or 1
Input
Input
Input
Input
Input
ADC
N/A
No Digital Microphones
Available on either DMIC_0 or DMIC_1
Both ADC Channels process data, may be in-phase or out-of-phase by 1/2
DMIC_CLK period depending upon external configuration and timing
Available on either DMIC_0 or DMIC_1
External logic required to support sampling on a single Digital Microphone pin
channel on rising edge and second Digital Microphone right channel on falling
edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge capability. If both DMIC_0 and DMIC_1 are used to support 2 digital
microphones, 2 separate ADC units will be used, however, this configuration is
not recommended since it consumes two stereo ADC resources.
Requires both DMIC_0 or DMIC_1
External logic required to support sampling on a single Digital Microphone pin
channel on rising edge and second Digital Microphone right channel on falling
edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge capability. Two ADC units are required to support this configuration
Connected to DMIC_0 and DMIC_1
External logic required to support sampling on a single Digital Microphone pin
channel on rising edge and second Digital Microphone right channel on falling
edge of DMIC_CLK for those digital microphones that don’t support alternative
clock edge capability. Two ADC units are required to support this configuration
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1 input widget
is enabled. Otherwise, the DMIC_CLK remains low.
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1 input widget
is enabled. Otherwise, the DMIC_CLK remains low.
DMIC_CLK remains low
DMIC_CLK remains low
DMIC_CLK is HIGH-Z with weak pull-down
15
Notes
Notes
STAC9204/9205
PC AUDIO
V 1.0 12/06