IDTSTAC9753AXNAED1X IDT, Integrated Device Technology Inc, IDTSTAC9753AXNAED1X Datasheet - Page 63

• Manufacturer Part Number: IDTSTAC9753AXNAED1X
• Description: IC CODEC AC'97 MIC/JACK 32-QFN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9753AXNAED1X

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 85 / 92
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465/5.25V
• Package Type: VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9753AXNAED1X

IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
7.1.19.
Bit(s)
1
0
D15
ID1
D7
7.1.18.1.
The lower half of this register is read only status, a 1 indicating that each subsection is ready. Ready
is defined as the subsection's ability to perform in its nominal state. When this register is written, the
bit values that come in on AC-Link will have no effect on read-only bits 0-7.
When the AC-Link “CODEC Ready” indicator bit (SDATA_IN slot 0, bit 15) is a 1, it indicates that the
AC-Link and AC'97 control and status registers are in a fully operational state. The AC'97 controller
must further probe this PowerdownControl/Status Register to determine exactly which subsections,
if any, are ready. When this register is written, the bit values that come in on AC-Link will have no
effect on read-only bits 0-7.
7.1.18.2.
The STAC9752A/9753A is capable of operating at reduced power when no activity is required. The
power-down state is controlled by the Powerdown Register (26h). See the section “Low Power
Modes” for more information.
7.1.18.3.
The EAPD bit (bit 15 of the Powerdown Control/Status Register (Index 26h)), directly controls the
EAPD output, pin 45, and produces a logical 1 when this bit is set to logic high. This function is used
to control an external audio amplifier power-down. EAPD= 0 places approximately 0V on the output
pin, enabling an external audio amplifier. EAPD=1 places approximately DVdd on the output pin,
disabling the external audio amplifier. Audio amplifiers that operate with reverse polarity will likely
require an external inverter to maintain software driver compatibility.
EAPD can also act as a GPIO. See Section 7.4.11: page82. The GPIO controls in Section 7.2:
page68 have no effect on EAPD.
Extended Audio ID (28h)
Default: 0A05h
The Extended Audio ID register is a read-only register except for bits D4 and D5. ID1 and ID0 echo
the configuration of the CODEC as defined by the programming of pins 45 and 46 externally. “00”
returned defines the CODEC as the primary CODEC, while any other code identifies the CODEC as
Reset Value
Reserved
1
1
D14
ID0
Ready Status
Powerdown Controls
External Amplifier Power Down Control Output
D6
Name
DAC
ADC
DSA1
D13
D5
Read Only ---- DAC Status
1 = DAC ready to playback
Read Only ---- ADC Status
1 = ADC ready to record
DSA0
D12
63
D4
Reserved
RESVD
D11
D3
Description
STAC9752A/9753A
SPDIF
D10
D2
AMAP
RSVD
D9
D1
PC AUDIO
RSVD
VRA
V 1.5 1206
D8
D0