CS4271-DZZR Cirrus Logic Inc, CS4271-DZZR Datasheet - Page 40

IC CODEC 24BIT 114DB 28-TSSOP

CS4271-DZZR

Manufacturer Part Number
CS4271-DZZR
Description
IC CODEC 24BIT 114DB 28-TSSOP
Manufacturer
Cirrus Logic Inc
Type
Stereo Audior
Datasheet

Specifications of CS4271-DZZR

Package / Case
28-TSSOP
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
108 / 114
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.1 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
192 KSPs
Interface Type
Serial (I2C, SPI)
Resolution
24 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Channels
2 ADC, 2 DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1003 - EVAL BOARD CS4271 STEREO CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
8.2.4
8.2.5
8.2.6
8.3
8.3.1
8.3.2
40
Reserved
Soft Ramp Enable
Zero Cross Enable
7
DAC Volume & Mixing Control - Address 03h
Function:
Function:
Function:
Function:
Function:
Soft Volume Ramp-Up After Error (Bit 3)
Soft Ramp-Down Before Filter Mode Change (Bit 2)
Invert Signal Polarity (Bits 1:0)
Channel B Volume = Channel A Volume (Bit 6)
Soft Ramp or Zero Cross Enable (Bits 5:4)
An un-mute will be performed after executing a filter mode change, after a MCLK/LRCK ratio change
or error, and after changing the Functional Mode. When this bit is set, this un-mute is effected, similar
to attenuation changes, by the Soft and ZeroCross bits in the DAC Volume & Mixing Control register.
When cleared, an immediate un-mute is performed in these instances.
Note: For best results, it is recommended that this feature be used with the RMP_DN bit.
A mute will be performed prior to executing a filter mode change. When this bit is set, this mute is
effected, similar to attenuation changes, by the Soft and ZeroCross bits in the DAC Volume & Mixing
Control register. When cleared, an immediate mute is performed prior to executing a filter mode
change.
Note: For best results, it is recommended that this feature be used in conjunction with the RMP_UP
bit.
When set, this bit activates an inversion of the signal polarity for the appropriate channel. This is use-
ful if a board layout error has occurred, or other situations where a 180 degree phase shift is desirable.
The AOUTA and AOUTB volume levels are independently controlled by the A and the B Channel Vol-
ume Control Bytes when this function is disabled. The volume on both AOUTA and AOUTB are de-
termined by the A Channel Volume Control Byte and the B Channel Byte is ignored when this function
is enabled. Volume and muting functions are effected by the Soft Ramp and ZeroCross functions be-
low.
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally
ramping, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock
periods. See Table 14 on page 41.
Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will
occur on a signal zero crossing to minimize audible artifacts. The requested level change will occur
after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample
rate) if the signal does not encounter a zero crossing. The zero cross function is independently mon-
B=A
6
Soft
5
ZeroCross
4
ATAPI3
3
ATAPI2
2
ATAPI1
1
CS4271
ATAPI0
DS592F1
0

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