UDA1380HN/N2,118 NXP Semiconductors, UDA1380HN/N2,118 Datasheet - Page 56

• Manufacturer Part Number: UDA1380HN/N2,118
• Description: IC AUDIO CODEC MINIDISC 32HVQFN
• Manufacturer: NXP Semiconductors
• Type: Stereo Audior

Specifications of UDA1380HN/N2,118

• Package / Case: 32-VFQFN Exposed Pad
• Data Interface: I²C, Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 97 / 100
• Voltage - Supply, Analog: 2.4 V ~ 3.6 V
• Voltage - Supply, Digital: 2.4 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Interface Type: Serial (I2C)
• Resolution: 24 bit
• Operating Supply Voltage: 3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Current: 10 mA
• Thd Plus Noise: - 85 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935271001118; UDA1380HN-T; UDA1380HN-T

NXP Semiconductors
18 TIMING
V
otherwise specified.
2004 Apr 22
System clock timing; note 1
T
t
t
Serial interface input/output data timing (see Fig.17)
f
T
t
t
t
t
t
t
t
t
t
t
t
L3-bus interface timing (see Figs 18 and 19)
t
t
T
t
t
t
t
t
t
DDD
CWL
CWH
BCK
BCKH
BCKL
r
f
su(WS)
h(WS)
su(DATAI)
h(DATAI)
h(DATAO)
d(DATAO-BCK)
d(DATAO-WS)
r
f
CLK(L3)H
CLK(L3)L
su(L3)A
h(L3)A
su(L3)D
h(L3)D
sys
cy(BCK)
cy(CLK)L3
Stereo audio coder-decoder
for MD, CD and MP3
SYMBOL
= V
DDA(AD)
system clock cycle time
system clock LOW time
system clock HIGH time
bit clock frequency
bit clock cycle time
bit clock HIGH time
bit clock LOW time
rise time
fall time
word select set-up time
word select hold time
data input set-up time
data input hold time
data output hold time
data output to bit clock delay
data output to word select delay
rise time
fall time
L3CLOCK cycle time
L3CLOCK HIGH time
L3CLOCK LOW time
L3MODE set-up time in address
mode
L3MODE hold time in address
mode
L3MODE set-up time in data
transfer mode
L3MODE hold time in data transfer
mode
= V
DDA(DA)
PARAMETER
= V
DDA(HP)
= 2.7 to 3.6 V; T
f
f
f
f
f
f
f
f
note 3
note 3
note 4
note 4
note 4
sys
sys
sys
sys
sys
sys
sys
sys
CONDITIONS
amb
= 256f
= 384f
= 512f
= 768f
< 19.2 MHz
≥ 19.2 MHz
< 19.2 MHz
≥ 19.2 MHz
56
= −20 to +85 °C; all voltages referenced to ground; unless
s
s
s
s
35
23
17
17
0.3T
0.4T
0.3T
0.4T
−
−
30
30
−
−
10
10
10
10
0
−
−
−
−
500
250
250
190
190
190
190
MIN.
sys
sys
sys
sys
81
54
41
27
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
TYP.
250
170
130
90
0.7T
0.6T
0.7T
0.6T
128f
1
−
−
20
20
−
−
−
−
−
30
30
10
10
−
−
−
−
−
−
−
Product specification
⁄
128
MAX.
UDA1380
T
s
sys
sys
sys
sys
cy(s)
(2)
ns
ns
ns
ns
ns
ns
ns
ns
Hz
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns/V
ns/V
ns
ns
ns
ns
ns
ns
ns
UNIT