XE3005I064TRLF Semtech, XE3005I064TRLF Datasheet - Page 12

IC CODEC LOW PWR 16BIT 20-UCSP

XE3005I064TRLF

Manufacturer Part Number
XE3005I064TRLF
Description
IC CODEC LOW PWR 16BIT 20-UCSP
Manufacturer
Semtech
Type
Audio Codecr
Datasheet

Specifications of XE3005I064TRLF

Data Interface
Serial
Resolution (bits)
16 b
Number Of Adcs / Dacs
1 / 1
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
78 / 78
Dynamic Range, Adcs / Dacs (db) Typ
78 / 78
Voltage - Supply, Analog
1.8 V ~ 3.6 V
Voltage - Supply, Digital
1.8 V ~ 3.6 V
Operating Temperature
-20°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-UCSP®
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
XE3005I064TR
2.2
2.2.1
Register I allows for the selective power down of the ADC signal channel or the DAC signal channel through SPI control.
The wake-up time, after powering down the device is typically 200µs. The maximum standby current is 96µA, depending
highly upon the Master clock (MCLK), see 5.3.5.2 Low Power Modes.
2.2.2
The device has no power-down pin. However, by holding down (0 V) the NRESET pin (resetting the device) as well as
the pins MCLK, BCLK and FSYNC, the power consumption will reach the standby current of typically 16µA. Use the
standard procedure for power up (see start-up and initialization procedure) after a hardware power down and apply your
registers setup procedure.
© Semtech 2005
1. Leave the NRESET pin not connected. In this case the CODEC will startup as described in figure 10.
2. Use the NRESET pin as an output to indicate, to e.g. a microcontroller, that the CODEC finished its power up
3. Use the NRESET pin to force a re-initialization of the registers to their default values. In this case the user has to
Figure 12 shows the block diagram of the CODEC reset.
POWER-DOWN FUNCTIONS
sequence and that the CODEC is ready to operate.
force the NRESET to 0V for at least 32 periods of the MCLK. The circuit which forces the NRESET to 0V should
be able to sink at least 50 uA.
Software Power-Down
Hardware Power-Down
reset to analog and
digital circuitry of codec
Power
On
Reset
XE3005/6
Figure 12: Codec reset circuitry
delay
counter
delay
MCLK
12
low drive
buffer
NRESET
XE3005/XE3006
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