CS42518-CQZ Cirrus Logic Inc, CS42518-CQZ Datasheet - Page 22

• Manufacturer Part Number: CS42518-CQZ
• Description: IC CODEC S/PDIF RCVR 64LQFP
• Manufacturer: Cirrus Logic Inc
• Type: General Purposer

Specifications of CS42518-CQZ

• Package / Case: 64-LQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 110
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 8
• Conversion Rate: 192 KSPS
• Interface Type: Serial (I2C, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/8 DAC
• Thd Plus Noise: - 100 dB ADC / - 100 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1502 - BOARD EVAL FOR CS42518 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1036

22
4.2.2
4.3
4.3.1
4.3.2
Analog Outputs
High-Pass Filter and DC Offset Calibration
The high-pass filter continuously subtracts a measure of the DC offset from the output of the decimation
filter. The high-pass filter can be independently enabled and disabled. If the HPF_Freeze bit is set during
normal operation, the current value of the DC offset for the corresponding channel is frozen and this DC
offset will continue to be subtracted from the conversion result. This feature makes it possible to perform
a system DC offset calibration by:
1. Running the CS42518 with the high-pass filter enabled until the filter settles. See the Digital Filter
2. Disabling the high-pass filter and freezing the stored DC offset.
The high-pass filters are controlled using the HPF_FREEZE bit in the register
05h)” on page
Line-Level Outputs and Filtering
The CS42518 contains on-chip buffer amplifiers capable of producing line-level differential outputs. These
amplifiers are biased to a quiescent DC level of approximately VQ.
The delta-sigma conversion process produces high-frequency noise beyond the audio passband, most of
which is removed by the on-chip analog filters. The remaining out-of-band noise can be attenuated using
an off-chip low-pass filter. See
configuration accounts for the normally differing AC loads on the AOUT+ and AOUT- differential output
pins. It also shows an AC coupling configuration which minimizes the number of required AC coupling ca-
pacitors. Figure 7 shows the full-scale analog output levels.
Interpolation Filter
To accommodate the increasingly complex requirements of digital audio systems, the CS42518 incorpo-
rates selectable interpolation filters for each mode of operation. A “fast” and a “slow” roll-off filter is avail-
able in Single-, Double-, and Quad-Speed Modes. These filters have been designed to accommodate a
variety of musical tastes and styles. The FILT_SEL bit found in the register
on page 51
Characteristics for filter settling time.
selects which filter is used. Filter response plots can be found in
51.
AOUT+
AOUT-
Full-Scale Output Level= (AIN+) - (AIN-)= 5 Vpp
“DAC Output Filter” on page 73
Figure 7. Full-Scale Output
for a recommended output buffer. This filter
3.95 V
2.7 V
1.45 V
3.95 V
2.7 V
1.45 V
“Misc Control (address 05h)”
Figures 46
“Misc Control (address
to 69.
CS42518
DS584F1