MC68HC000EI8R2 Freescale Semiconductor, MC68HC000EI8R2 Datasheet - Page 23
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MC68HC000EI8R2
Manufacturer Part Number
MC68HC000EI8R2
Description
IC MPU 16BIT 8MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC000IEI16.pdf
(189 pages)
Specifications of MC68HC000EI8R2
Processor Type
M680x0 32-Bit
Speed
8MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC000EI8R2
Manufacturer:
FREESCAL
Quantity:
8 831
Company:
Part Number:
MC68HC000EI8R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Notation for operands:
Notation for subfields and qualifiers:
Notations for operations that have two operands, written <operand> <op> <operand>,
where <op> is one of the following:
MOTOROLA
–(<address register>) — Indicates that the operand register points to the memory
(<address register>)+ — Location of the instruction operand—the optional mode
(<address register>) — The register indirect operator
<bit> of <operand> — Selects a single bit of the operand
<ea>{offset:width} — Selects a bit field
#xxx or #<data> — Immediate data that follows the instruction word(s)
Immediate Data — Immediate data from the instruction
<operand>10 — The operand is binary-coded decimal, operations are
(<operand>) — The contents of the referenced location
Destination — Destination contents
M68000 8-/16-/32-BIT MICROPROCESSOR USER’S MANUAL
Source — Source contents
Vector — Location of exception vector
<fmt> — Operand data format: byte (B), word (W), long (L), single
FPm — One of eight floating-point data registers (always
FPn — One of eight floating-point data registers (always
Freescale Semiconductor, Inc.
+inf — Positive infinity
–inf — Negative infinity
PC — Program counter
SR — Status register
For More Information On This Product,
V — Overflow condition code
V — Logical OR
+ — The operands are added
– — The destination operand is subtracted from the source
< — Relational test, true if source operand is less than
> — Relational test, true if source operand is greater than
— The source operand is moved to the destination operand
— The two operands are exchanged
— The operands are multiplied
— The source operand is divided by the destination
— Logical exclusive OR
— Logical AND
(S), double (D), extended (X), or packed (P).
specifies the source register)
specifies the destination register)
performed in decimal
qualifiers are –, +, (d), and (d, ix)
operand
operand
destination operand
destination operand
Go to: www.freescale.com
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