GDPXA255A0C400 Intel, GDPXA255A0C400 Datasheet - Page 12

• Manufacturer Part Number: GDPXA255A0C400
• Description: IC MICRO PROCESSOR 400MHZ 256BGA
• Manufacturer: Intel

Specifications of GDPXA255A0C400

• Processor Type: XScale®
• Speed: 400MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 852053; GDPXA255A0C400; Q1500441

Package Information
12
L_DD[9]/
GPIO[67]
L_DD[10]/
GPIO[68]
L_DD[11]/
GPIO[69]
L_DD[12]/
GPIO[70]
L_DD[13]/
GPIO[71]
L_DD[14]/
GPIO[72]
L_DD[15]/
GPIO[73]
L_FCLK/
GPIO[74]
L_LCLK/
GPIO[75]
L_PCLK/
GPIO[76]
L_BIAS/
GPIO[77]
Full Function UART Pins
FFRXD/
GPIO[34]
FFTXD/
GPIO[39]
FFCTS/
GPIO[35]
FFDCD/
GPIO[36]
FFDSR/
GPIO[37]
Pin Name
Table 3.
Pin and Signal Descriptions for the PXA255 Processor (Sheet 4 of 9)
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
ICOCZ
Type
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
MMC chip select 0. (output) Chip select 0 for the MMC
controller.
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
MMC chip select 1. (output) Chip select 1 for the MMC
controller.
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
MMC clock. (output) Clock for the MMC controller.
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
RTC clock. (output) Real-time clock 1 Hz tick.
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
3.6864 MHz clock. (output) Output from 3.6864 MHz
oscillator.
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
32 kHz clock. (output) Output from the 32 kHz oscillator.
LCD display data. (output) Transfers pixel information
from the LCD controller to the external LCD panel.
Memory Controller grant. (output) Notifies an external
device it has been granted the system bus.
LCD frame clock. (output) Indicates the start of a new
frame. Also referred to as Vsync.
LCD line clock. (output) Indicates the start of a new line.
Also referred to as Hsync.
LCD pixel clock. (output) Clocks valid pixel data into the
LCD line-shift buffer.
AC bias drive. (output) Notifies the panel to change the
polarity for some passive LCD panel. For TFT panels,
this signal indicates valid pixel data.
Full function UART receive. (input)
MMC chip select 0. (output) Chip select 0 for the MMC
Controller.
Full Function UART transmit. (output)
MMC chip select 1. (output) Chip select 1 for the MMC
Controller.
Full function UART clear-to-send. (input)
Full function UART data-carrier-detect. (input)
Full function UART data-set-ready. (input)
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification
Signal Descriptions
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Pulled High -
Note[1]
Reset State
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Sleep State